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| author | Tony Cheng <tony.cheng@amd.com> | 2017-01-12 23:18:33 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 17:10:07 -0400 |
| commit | f84a8161cb1652281746d113667427dbbf8bd5db (patch) | |
| tree | c2e40e194cfe264067f698dc0dd89d1764d88afb | |
| parent | 858058da47a557b6c0211830d530045c1c8e62ab (diff) | |
| download | linux-stable-f84a8161cb1652281746d113667427dbbf8bd5db.tar.gz linux-stable-f84a8161cb1652281746d113667427dbbf8bd5db.tar.bz2 linux-stable-f84a8161cb1652281746d113667427dbbf8bd5db.zip | |
drm/amd/display: mode change without breaking unaffected streams
- include clock constraint logic in validate
- in dc_commit_streams, include surfaces of unaffected streams
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc.c | 11 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/core_status.h | 2 |
3 files changed, 12 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 948f82a56472..9deddc8ee2d1 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -1007,7 +1007,7 @@ bool dc_commit_streams( struct dc_bios *dcb = core_dc->ctx->dc_bios; enum dc_status result = DC_ERROR_UNEXPECTED; struct validate_context *context; - struct dc_validation_set set[MAX_STREAMS]; + struct dc_validation_set set[MAX_STREAMS] = { 0 }; int i, j, k; if (false == streams_changed(core_dc, streams, stream_count)) @@ -1018,13 +1018,20 @@ bool dc_commit_streams( for (i = 0; i < stream_count; i++) { const struct dc_stream *stream = streams[i]; + const struct dc_stream_status *status = dc_stream_get_status(stream); + int j; dc_stream_log(stream, core_dc->ctx->logger, LOG_DC); set[i].stream = stream; - set[i].surface_count = 0; + + if (status) { + set[i].surface_count = status->surface_count; + for (j = 0; j < status->surface_count; j++) + set[i].surfaces[j] = status->surfaces[j]; + } } diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index 1f87b948678b..6037ee25598c 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -585,7 +585,7 @@ enum dc_status resource_build_scaling_params_for_context( if (!resource_build_scaling_params( &context->res_ctx.pipe_ctx[i].surface->public, &context->res_ctx.pipe_ctx[i])) - return DC_FAIL_BANDWIDTH_VALIDATE; + return DC_FAIL_SCALING; } return DC_OK; diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_status.h b/drivers/gpu/drm/amd/display/dc/inc/core_status.h index 32a2cc712000..147eb7cac701 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_status.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_status.h @@ -40,6 +40,8 @@ enum dc_status { DC_EXCEED_DONGLE_MAX_CLK, DC_SURFACE_PIXEL_FORMAT_UNSUPPORTED, DC_FAIL_BANDWIDTH_VALIDATE, /* BW and Watermark validation */ + DC_FAIL_SCALING, + DC_FAIL_CLK_CONSTRAINT, DC_ERROR_UNEXPECTED = -1 }; |