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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-01 15:45:27 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-01 15:45:27 -0700 |
commit | b23c4771ff62de8ca9b5e4a2d64491b2fb6f8f69 (patch) | |
tree | 3ff6b2bdfec161fbc383bba06bab6329e81b02f7 /Documentation/arm64/amu.rst | |
parent | c2b0fc847f3122e5a4176c3772626a7a8facced0 (diff) | |
parent | e35b5a4c494a75a683ddf4901a43e0a128d5bfe3 (diff) | |
download | linux-stable-b23c4771ff62de8ca9b5e4a2d64491b2fb6f8f69.tar.gz linux-stable-b23c4771ff62de8ca9b5e4a2d64491b2fb6f8f69.tar.bz2 linux-stable-b23c4771ff62de8ca9b5e4a2d64491b2fb6f8f69.zip |
Merge tag 'docs-5.8' of git://git.lwn.net/linux
Pull documentation updates from Jonathan Corbet:
"A fair amount of stuff this time around, dominated by yet another
massive set from Mauro toward the completion of the RST conversion. I
*really* hope we are getting close to the end of this. Meanwhile,
those patches reach pretty far afield to update document references
around the tree; there should be no actual code changes there. There
will be, alas, more of the usual trivial merge conflicts.
Beyond that we have more translations, improvements to the sphinx
scripting, a number of additions to the sysctl documentation, and lots
of fixes"
* tag 'docs-5.8' of git://git.lwn.net/linux: (130 commits)
Documentation: fixes to the maintainer-entry-profile template
zswap: docs/vm: Fix typo accept_threshold_percent in zswap.rst
tracing: Fix events.rst section numbering
docs: acpi: fix old http link and improve document format
docs: filesystems: add info about efivars content
Documentation: LSM: Correct the basic LSM description
mailmap: change email for Ricardo Ribalda
docs: sysctl/kernel: document unaligned controls
Documentation: admin-guide: update bug-hunting.rst
docs: sysctl/kernel: document ngroups_max
nvdimm: fixes to maintainter-entry-profile
Documentation/features: Correct RISC-V kprobes support entry
Documentation/features: Refresh the arch support status files
Revert "docs: sysctl/kernel: document ngroups_max"
docs: move locking-specific documents to locking/
docs: move digsig docs to the security book
docs: move the kref doc into the core-api book
docs: add IRQ documentation at the core-api book
docs: debugging-via-ohci1394.txt: add it to the core-api book
docs: fix references for ipmi.rst file
...
Diffstat (limited to 'Documentation/arm64/amu.rst')
-rw-r--r-- | Documentation/arm64/amu.rst | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/Documentation/arm64/amu.rst b/Documentation/arm64/amu.rst index 036783ee327f..452ec8b115c2 100644 --- a/Documentation/arm64/amu.rst +++ b/Documentation/arm64/amu.rst @@ -24,13 +24,13 @@ optional external memory-mapped interface. Version 1 of the Activity Monitors architecture implements a counter group of four fixed and architecturally defined 64-bit event counters. -- CPU cycle counter: increments at the frequency of the CPU. -- Constant counter: increments at the fixed frequency of the system - clock. -- Instructions retired: increments with every architecturally executed - instruction. -- Memory stall cycles: counts instruction dispatch stall cycles caused by - misses in the last level cache within the clock domain. + - CPU cycle counter: increments at the frequency of the CPU. + - Constant counter: increments at the fixed frequency of the system + clock. + - Instructions retired: increments with every architecturally executed + instruction. + - Memory stall cycles: counts instruction dispatch stall cycles caused by + misses in the last level cache within the clock domain. When in WFI or WFE these counters do not increment. @@ -59,11 +59,11 @@ counters, only the presence of the extension. Firmware (code running at higher exception levels, e.g. arm-tf) support is needed to: -- Enable access for lower exception levels (EL2 and EL1) to the AMU - registers. -- Enable the counters. If not enabled these will read as 0. -- Save/restore the counters before/after the CPU is being put/brought up - from the 'off' power state. + - Enable access for lower exception levels (EL2 and EL1) to the AMU + registers. + - Enable the counters. If not enabled these will read as 0. + - Save/restore the counters before/after the CPU is being put/brought up + from the 'off' power state. When using kernels that have this feature enabled but boot with broken firmware the user may experience panics or lockups when accessing the @@ -81,10 +81,10 @@ are not trapped in EL2/EL3. The fixed counters of AMUv1 are accessible though the following system register definitions: -- SYS_AMEVCNTR0_CORE_EL0 -- SYS_AMEVCNTR0_CONST_EL0 -- SYS_AMEVCNTR0_INST_RET_EL0 -- SYS_AMEVCNTR0_MEM_STALL_EL0 + - SYS_AMEVCNTR0_CORE_EL0 + - SYS_AMEVCNTR0_CONST_EL0 + - SYS_AMEVCNTR0_INST_RET_EL0 + - SYS_AMEVCNTR0_MEM_STALL_EL0 Auxiliary platform specific counters can be accessed using SYS_AMEVCNTR1_EL0(n), where n is a value between 0 and 15. @@ -97,9 +97,9 @@ Userspace access Currently, access from userspace to the AMU registers is disabled due to: -- Security reasons: they might expose information about code executed in - secure mode. -- Purpose: AMU counters are intended for system management use. + - Security reasons: they might expose information about code executed in + secure mode. + - Purpose: AMU counters are intended for system management use. Also, the presence of the feature is not visible to userspace. @@ -110,8 +110,8 @@ Virtualization Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM guest side is disabled due to: -- Security reasons: they might expose information about code executed - by other guests or the host. + - Security reasons: they might expose information about code executed + by other guests or the host. Any attempt to access the AMU registers will result in an UNDEFINED exception being injected into the guest. |