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author | Stephen Boyd <sboyd@codeaurora.org> | 2016-06-28 16:36:34 -0700 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-06-28 16:36:34 -0700 |
commit | b1683d37444058a159f2de37660aeb1691d89a7d (patch) | |
tree | 235dc8d639233aed4714d526882ce6a4b27398d5 /Documentation/devicetree/bindings/clock | |
parent | 9e60de1cf2705b78d91eab1353cf778a7b7c348f (diff) | |
parent | e4e2d7c388350eba8b1dbc2569441ac9b545a8c4 (diff) | |
download | linux-stable-b1683d37444058a159f2de37660aeb1691d89a7d.tar.gz linux-stable-b1683d37444058a159f2de37660aeb1691d89a7d.tar.bz2 linux-stable-b1683d37444058a159f2de37660aeb1691d89a7d.zip |
Merge tag 'clk-renesas-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next
Pull support for Renesas R-car M3-W from Geert Uytterhoeven:
Add initial support for the Clock Pulse Generator and Module Standby and
Software Reset modules on the Renesas R-Car M3-W SoC:
- Basic core clocks,
- SCIF2 (console) module clock,
- INTC-AP (GIC) module clock.
* tag 'clk-renesas-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: cpg-mssr: Add support for R-Car M3-W
clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code
clk: renesas: Add r8a7796 CPG Core Clock Definitions
clk: renesas: cpg-mssr: Document r8a7796 support
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt index fefb8023020f..394d725ac7e0 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt @@ -13,7 +13,8 @@ They provide the following functionalities: Required Properties: - compatible: Must be one of: - - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC + - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3) + - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W) - reg: Base address and length of the memory resource used by the CPG/MSSR block @@ -21,8 +22,8 @@ Required Properties: - clocks: References to external parent clocks, one entry for each entry in clock-names - clock-names: List of external parent clock names. Valid names are: - - "extal" (r8a7795) - - "extalr" (r8a7795) + - "extal" (r8a7795, r8a7796) + - "extalr" (r8a7795, r8a7796) - #clock-cells: Must be 2 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE" |