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author | Kedareswara rao Appana <appana.durga.rao@xilinx.com> | 2016-07-01 17:07:05 +0530 |
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committer | Vinod Koul <vinod.koul@intel.com> | 2016-07-08 11:24:59 +0530 |
commit | 805abc5f2f5d374086114f941e5bb6cb02e0c955 (patch) | |
tree | 90d6146958ca53d4eea022f054091cfdfb1cb855 /Documentation/devicetree/bindings/dma | |
parent | e131f1ba6f6f177a5b28610dff270d67eedcadbf (diff) | |
download | linux-stable-805abc5f2f5d374086114f941e5bb6cb02e0c955.tar.gz linux-stable-805abc5f2f5d374086114f941e5bb6cb02e0c955.tar.bz2 linux-stable-805abc5f2f5d374086114f941e5bb6cb02e0c955.zip |
Documentation: DT: dma: Add Xilinx zynqmp dma device tree binding documentation
Device-tree binding documentation for Xilinx zynqmp dma engine
used in Zynq UltraScale+ MPSoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/dma')
-rw-r--r-- | Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt new file mode 100644 index 000000000000..a784cdd94790 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt @@ -0,0 +1,27 @@ +Xilinx ZynqMP DMA engine, it does support memory to memory transfers, +memory to device and device to memory transfers. It also has flow +control and rate control support for slave/peripheral dma access. + +Required properties: +- compatible : Should be "xlnx,zynqmp-dma-1.0" +- reg : Memory map for gdma/adma module access. +- interrupt-parent : Interrupt controller the interrupt is routed through +- interrupts : Should contain DMA channel interrupt. +- xlnx,bus-width : Axi buswidth in bits. Should contain 128 or 64 +- clock-names : List of input clocks "clk_main", "clk_apb" + (see clock bindings for details) + +Optional properties: +- dma-coherent : Present if dma operations are coherent. + +Example: +++++++++ +fpd_dma_chan1: dma@fd500000 { + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xFD500000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 117 4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <128>; + dma-coherent; +}; |