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author | Andrew Davis <afd@ti.com> | 2024-01-09 11:19:40 -0600 |
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committer | Tony Lindgren <tony@atomide.com> | 2024-01-26 09:40:17 +0200 |
commit | 35df039b26ac771a019d2f48abd44020eb2615e2 (patch) | |
tree | f4b6398de6104af10ab548d92c053118a108bfb8 /Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | |
parent | 6613476e225e090cc9aad49be7fa504e290dd33d (diff) | |
download | linux-stable-35df039b26ac771a019d2f48abd44020eb2615e2.tar.gz linux-stable-35df039b26ac771a019d2f48abd44020eb2615e2.tar.bz2 linux-stable-35df039b26ac771a019d2f48abd44020eb2615e2.zip |
dt-bindings: gpu: Rename img,powervr to img,powervr-rogue
This binding will be used for GPUs starting from Series6 (Rogue)
and later. A different binding document will describe Series5.
With that the name "img,powervr" is too generic, rename to
"img,powervr-rogue" to avoid confusion.
Suggested-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Message-ID: <20240109171950.31010-2-afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml new file mode 100644 index 000000000000..256e252f8087 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2023 Imagination Technologies Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/img,powervr-rogue.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Imagination Technologies PowerVR and IMG Rogue GPUs + +maintainers: + - Frank Binns <frank.binns@imgtec.com> + +properties: + compatible: + items: + - enum: + - ti,am62-gpu + - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + items: + - const: core + - const: mem + - const: sys + minItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: ti,am62-gpu + then: + properties: + clocks: + maxItems: 1 + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/soc/ti,sci_pm_domain.h> + + gpu@fd00000 { + compatible = "ti,am62-gpu", "img,img-axe"; + reg = <0x0fd00000 0x20000>; + clocks = <&k3_clks 187 0>; + clock-names = "core"; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>; + }; |