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authorEric Anholt <eric@anholt.net>2019-03-08 09:43:36 -0800
committerEric Anholt <eric@anholt.net>2019-03-08 15:09:56 -0800
commiteea9b97b4504607a0805c71b20d2c3e93c8711a7 (patch)
treefa1df4cc294d220a6561373031e985e28c6f8e9b /Documentation/devicetree/bindings/gpu
parentfc22771547e7e8a63679f0218e943d72b107de65 (diff)
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drm/v3d: Add support for V3D v4.2.
No compatible string for it yet, just the version-dependent changes. They've now tied the hub and the core interrupt lines into a single interrupt line coming out of the block. It also turns out I made a mistake in modeling the V3D v3.3 and v4.1 bridge as a part of V3D itself -- the bridge is going away in favor of an external reset controller in a larger HW module. v2: Use consistent checks for whether we're on 4.2, and fix a leak in an error path. v3: Use more general means of determining if the current 4.2 changes are in place, as apparently other platforms may switch back (noted by Dave). Update the binding doc. v4: Improve error handling for IRQ init. Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20190308174336.7866-2-eric@anholt.net Reviewed-by: Dave Emett <david.emett@broadcom.com>
Diffstat (limited to 'Documentation/devicetree/bindings/gpu')
-rw-r--r--Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt11
1 files changed, 8 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
index c907aa8dd755..b2df82b44625 100644
--- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
+++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
@@ -6,15 +6,20 @@ For V3D 2.x, see brcm,bcm-vc4.txt.
Required properties:
- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d"
- reg: Physical base addresses and lengths of the register areas
-- reg-names: Names for the register areas. The "hub", "bridge", and "core0"
+- reg-names: Names for the register areas. The "hub" and "core0"
register areas are always required. The "gca" register area
- is required if the GCA cache controller is present.
+ is required if the GCA cache controller is present. The
+ "bridge" register area is required if an external reset
+ controller is not present.
- interrupts: The interrupt numbers. The first interrupt is for the hub,
- while the following interrupts are for the cores.
+ while the following interrupts are separate interrupt lines
+ for the cores (if they don't share the hub's interrupt).
See bindings/interrupt-controller/interrupts.txt
Optional properties:
- clocks: The core clock the unit runs on
+- resets: The reset line for v3d, if not using a mapping of the bridge
+ See bindings/reset/reset.txt
v3d {
compatible = "brcm,7268-v3d";