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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2020-10-31 18:48:41 +0000
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2020-11-25 14:35:55 +0000
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tree70c9d7c3f1e6faf5f9ff304952c0dde42a5382d3 /Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml
parent25b49a31fb03357f5c330ad709f9ec5365136cc0 (diff)
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dt-bindings:iio:adc:mediatek,mt2701-auxadc: rename and yaml conversion.
The current driver and indeed binding are named after a part that they do not list in the compatible. Hence renamed the binding to reflect one that does. >From the driver it looks like there is a lot more backwards compatibility than the binding currently reflects. We could consider expressing that more explicitly in the yaml for the compatible property. I have added one explicit pair that was present in the upstream dtsi files. I added Matthias alongside Zhiyong Tao because I don't think Zhiyong Tao has reviewed recent patches. Please let me know if this isn't the right thing to do. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Rob Herring <robh@kernel.org> Cc: Zhiyong Tao <zhiyong.tao@mediatek.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20201031184854.745828-34-jic23@kernel.org
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+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx)
+
+maintainers:
+ - Zhiyong Tao <zhiyong.tao@mediatek.com>
+ - Matthias Brugger <matthias.bgg@gmail.com>
+
+description: |
+ The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
+ in some Mediatek SoCs which among other things measures the temperatures
+ in the SoC. It can be used directly with register accesses, but it is also
+ used by thermal controller which reads the temperatures from the AUXADC
+ directly via its own bus interface. See mediatek-thermal bindings
+ for the Thermal Controller which holds a phandle to the AUXADC.
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - mediatek,mt2701-auxadc
+ - mediatek,mt2712-auxadc
+ - mediatek,mt6765-auxadc
+ - mediatek,mt7622-auxadc
+ - mediatek,mt8173-auxadc
+ - items:
+ - enum:
+ - mediatek,mt7623-auxadc
+ - const: mediatek,mt2701-auxadc
+ - items:
+ - enum:
+ - mediatek,mt8183-auxadc
+ - mediatek,mt8516-auxadc
+ - const: mediatek,mt8173-auxadc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: main
+
+ "#io-channel-cells":
+ const: 1
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#io-channel-cells"
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ adc@11001000 {
+ compatible = "mediatek,mt8183-auxadc",
+ "mediatek,mt8173-auxadc";
+ reg = <0 0x11001000 0 0x1000>;
+ clocks = <&infracfg CLK_INFRA_AUXADC>;
+ clock-names = "main";
+ #io-channel-cells = <1>;
+ };
+ };
+...