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author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-04-27 09:23:57 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-04-27 09:23:57 -0700 |
commit | d42b1c47570eb2ed818dc3fe94b2678124af109d (patch) | |
tree | b95a1ab93d7ea3e02a17532489aa1297a19aadfc /Documentation/devicetree/bindings/iommu | |
parent | 6df969b77ecc2ba21dcd0e57f416e58bec2a5ca1 (diff) | |
parent | 66ae0535167660e427f9fcadeee5d05646e2bb22 (diff) | |
download | linux-stable-d42b1c47570eb2ed818dc3fe94b2678124af109d.tar.gz linux-stable-d42b1c47570eb2ed818dc3fe94b2678124af109d.tar.bz2 linux-stable-d42b1c47570eb2ed818dc3fe94b2678124af109d.zip |
Merge tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"Bindings:
- Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba
TC358764 display bridge, Parade PS8622 display bridge, and Xilinx
FPGA bindings to DT schema format
- Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt
controller
- Add MediaTek MT8365 UART and SYSIRQ bindings
- Add Arm Cortex-A78C and X1C core compatibles
- Add vendor prefix for Novatek
- Remove bindings for stih415, sti416, stid127 platforms
- Drop uneeded quotes in schema files. This is preparation for
yamllint checking quoting for us.
- Add missing (unevaluated|additional)Properties constraints on child
node schemas
- Clean-up schema comments formatting
- Fix I2C and SPI node bus names in schema examples
- Clean-up some display compatibles schema syntax
- Fix incorrect references to lvds.yaml
- Gather all cache controller bindings in a common directory
DT core:
- Convert unittest to new void .remove platform device hook
- kerneldoc fixes for DT address of_pci_range_to_resource/
of_address_to_resource functions"
* tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits)
dt-bindings: rng: Drop unneeded quotes
dt-bindings: arm/soc: mediatek: Drop unneeded quotes
dt-bindings: soc: qcom: Drop unneeded quotes
dt-bindings: i2c: samsung: Fix 'deprecated' value
dt-bindings: display: Fix lvds.yaml references
dt-bindings: display: simplify compatibles syntax
dt-bindings: display: mediatek: simplify compatibles syntax
dt-bindings: drm/bridge: ti-sn65dsi86: Fix the video-interfaces.yaml references
dt-bindings: timer: Drop unneeded quotes
dt-bindings: interrupt-controller: qcom,pdc: document qcom,qdu1000-pdc
dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p
dt-bindings: reset: remove stih415/stih416 reset
dt-bindings: net: dwmac: sti: remove stih415/sti416/stid127
dt-bindings: irqchip: sti: remove stih415/stih416 and stid127
dt-bindings: iommu: Convert QCOM IOMMU to YAML
dt-bindings: irqchip: ti,sci-inta: Add optional power-domains property
dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas
of: address: Reshuffle to remove forward declarations
of: address: Fix documented return value of of_pci_range_to_resource()
of: address: Document return value of of_address_to_resource()
...
Diffstat (limited to 'Documentation/devicetree/bindings/iommu')
-rw-r--r-- | Documentation/devicetree/bindings/iommu/qcom,iommu.txt | 122 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/iommu/qcom,iommu.yaml | 113 |
2 files changed, 113 insertions, 122 deletions
diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt deleted file mode 100644 index e6cecfd360eb..000000000000 --- a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt +++ /dev/null @@ -1,122 +0,0 @@ -* QCOM IOMMU v1 Implementation - -Qualcomm "B" family devices which are not compatible with arm-smmu have -a similar looking IOMMU but without access to the global register space, -and optionally requiring additional configuration to route context irqs -to non-secure vs secure interrupt line. - -** Required properties: - -- compatible : Should be one of: - - "qcom,msm8916-iommu" - "qcom,msm8953-iommu" - - Followed by "qcom,msm-iommu-v1". - -- clock-names : Should be a pair of "iface" (required for IOMMUs - register group access) and "bus" (required for - the IOMMUs underlying bus access). - -- clocks : Phandles for respective clocks described by - clock-names. - -- #address-cells : must be 1. - -- #size-cells : must be 1. - -- #iommu-cells : Must be 1. Index identifies the context-bank #. - -- ranges : Base address and size of the iommu context banks. - -- qcom,iommu-secure-id : secure-id. - -- List of sub-nodes, one per translation context bank. Each sub-node - has the following required properties: - - - compatible : Should be one of: - - "qcom,msm-iommu-v1-ns" : non-secure context bank - - "qcom,msm-iommu-v1-sec" : secure context bank - - reg : Base address and size of context bank within the iommu - - interrupts : The context fault irq. - -** Optional properties: - -- reg : Base address and size of the SMMU local base, should - be only specified if the iommu requires configuration - for routing of context bank irq's to secure vs non- - secure lines. (Ie. if the iommu contains secure - context banks) - - -** Examples: - - apps_iommu: iommu@1e20000 { - #address-cells = <1>; - #size-cells = <1>; - #iommu-cells = <1>; - compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1"; - ranges = <0 0x1e20000 0x40000>; - reg = <0x1ef0000 0x3000>; - clocks = <&gcc GCC_SMMU_CFG_CLK>, - <&gcc GCC_APSS_TCU_CLK>; - clock-names = "iface", "bus"; - qcom,iommu-secure-id = <17>; - - // mdp_0: - iommu-ctx@4000 { - compatible = "qcom,msm-iommu-v1-ns"; - reg = <0x4000 0x1000>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - }; - - // venus_ns: - iommu-ctx@5000 { - compatible = "qcom,msm-iommu-v1-sec"; - reg = <0x5000 0x1000>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - gpu_iommu: iommu@1f08000 { - #address-cells = <1>; - #size-cells = <1>; - #iommu-cells = <1>; - compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1"; - ranges = <0 0x1f08000 0x10000>; - clocks = <&gcc GCC_SMMU_CFG_CLK>, - <&gcc GCC_GFX_TCU_CLK>; - clock-names = "iface", "bus"; - qcom,iommu-secure-id = <18>; - - // gfx3d_user: - iommu-ctx@1000 { - compatible = "qcom,msm-iommu-v1-ns"; - reg = <0x1000 0x1000>; - interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; - }; - - // gfx3d_priv: - iommu-ctx@2000 { - compatible = "qcom,msm-iommu-v1-ns"; - reg = <0x2000 0x1000>; - interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - ... - - venus: video-codec@1d00000 { - ... - iommus = <&apps_iommu 5>; - }; - - mdp: mdp@1a01000 { - ... - iommus = <&apps_iommu 4>; - }; - - gpu@1c00000 { - ... - iommus = <&gpu_iommu 1>, <&gpu_iommu 2>; - }; diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml new file mode 100644 index 000000000000..d9fabdf930d9 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iommu/qcom,iommu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies legacy IOMMU implementations + +maintainers: + - Konrad Dybcio <konrad.dybcio@linaro.org> + +description: | + Qualcomm "B" family devices which are not compatible with arm-smmu have + a similar looking IOMMU, but without access to the global register space + and optionally requiring additional configuration to route context IRQs + to non-secure vs secure interrupt line. + +properties: + compatible: + items: + - enum: + - qcom,msm8916-iommu + - qcom,msm8953-iommu + - const: qcom,msm-iommu-v1 + + clocks: + items: + - description: Clock required for IOMMU register group access + - description: Clock required for underlying bus access + + clock-names: + items: + - const: iface + - const: bus + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + + ranges: true + + qcom,iommu-secure-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The SCM secure ID of the IOMMU instance. + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + '#iommu-cells': + const: 1 + +patternProperties: + "^iommu-ctx@[0-9a-f]+$": + type: object + additionalProperties: false + properties: + compatible: + enum: + - qcom,msm-iommu-v1-ns + - qcom,msm-iommu-v1-sec + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + required: + - compatible + - interrupts + - reg + +required: + - compatible + - clocks + - clock-names + - ranges + - '#address-cells' + - '#size-cells' + - '#iommu-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8916.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + apps_iommu: iommu@1e20000 { + compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1"; + reg = <0x01ef0000 0x3000>; + clocks = <&gcc GCC_SMMU_CFG_CLK>, + <&gcc GCC_APSS_TCU_CLK>; + clock-names = "iface", "bus"; + qcom,iommu-secure-id = <17>; + #address-cells = <1>; + #size-cells = <1>; + #iommu-cells = <1>; + ranges = <0 0x01e20000 0x40000>; + + /* mdp_0: */ + iommu-ctx@4000 { + compatible = "qcom,msm-iommu-v1-ns"; + reg = <0x4000 0x1000>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + }; + }; |