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authorPeng Fan <peng.fan@nxp.com>2022-02-07 09:52:09 +0800
committerJassi Brar <jaswinder.singh@linaro.org>2022-03-12 19:27:02 -0600
commit960dcc1574c7432ad4ff42e8b153f098bdfd5c8d (patch)
treef84e5947f9a5fcdcf96e1e2686148ceeb9af582d /Documentation/devicetree/bindings/mailbox
parent81a9d3b9301c9bb835d8ef595b2456084573db1b (diff)
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dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support
Similar to i.MX8QM/QXP SCU, i.MX8 SECO MU is dedicated for communication between SECO and Cortex-A cores from hardware design, it could not be reused for other purpose. To use SECO MU more effectivly, add "fsl,imx8-mu-seco" compatile to support fast IPC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mailbox')
-rw-r--r--Documentation/devicetree/bindings/mailbox/fsl,mu.yaml1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index a337bcd80c4a..f865b806ae6a 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -28,6 +28,7 @@ properties:
- const: fsl,imx7ulp-mu
- const: fsl,imx8ulp-mu
- const: fsl,imx8-mu-scu
+ - const: fsl,imx8-mu-seco
- const: fsl,imx8ulp-mu-s4
- items:
- enum: