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author | Kishon Vijay Abraham I <kishon@ti.com> | 2020-03-05 16:00:16 +0530 |
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committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-03-20 09:55:21 +0000 |
commit | 11be8af70d86c0a03706b329fb6f1a7329e3343a (patch) | |
tree | c875ef981e80f3609d1f788e9b0a93233f8bd081 /Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml | |
parent | 69501078fc605810d777a4bbc4df7d09c561998e (diff) | |
download | linux-stable-11be8af70d86c0a03706b329fb6f1a7329e3343a.tar.gz linux-stable-11be8af70d86c0a03706b329fb6f1a7329e3343a.tar.bz2 linux-stable-11be8af70d86c0a03706b329fb6f1a7329e3343a.zip |
dt-bindings: PCI: Convert PCIe Host/Endpoint in Cadence platform to DT schema
Include Cadence core DT schema and define the Cadence platform DT schema
for both Host and Endpoint mode. Note: The Cadence core DT schema could
be included for other platforms using Cadence PCIe core.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml new file mode 100644 index 000000000000..2996f8d4777c --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence PCIe EP Controller + +maintainers: + - Tom Joseph <tjoseph@cadence.com> + +allOf: + - $ref: "cdns-pcie.yaml#" + - $ref: "pci-ep.yaml#" + +properties: + compatible: + const: cdns,cdns-pcie-ep + + reg: + maxItems: 2 + + reg-names: + items: + - const: reg + - const: mem + +required: + - reg + - reg-names + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie-ep@fc000000 { + compatible = "cdns,cdns-pcie-ep"; + reg = <0x0 0xfc000000 0x0 0x01000000>, + <0x0 0x80000000 0x0 0x40000000>; + reg-names = "reg", "mem"; + cdns,max-outbound-regions = <16>; + max-functions = /bits/ 8 <8>; + phys = <&pcie_phy0>; + phy-names = "pcie-phy"; + }; + }; +... |