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| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2022-09-12 14:26:49 +0530 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2022-09-13 23:10:26 +0530 |
| commit | bd76037833244e4bf234130f1fa418ff54fd5779 (patch) | |
| tree | 647f46e53ef982fd8528e5ef1ce13c2a4eb935e4 /Documentation/devicetree/bindings/phy | |
| parent | 117c80fd0509e542268692b2dd9e1123877a95ab (diff) | |
| download | linux-stable-bd76037833244e4bf234130f1fa418ff54fd5779.tar.gz linux-stable-bd76037833244e4bf234130f1fa418ff54fd5779.tar.bz2 linux-stable-bd76037833244e4bf234130f1fa418ff54fd5779.zip | |
dt-bindings: phy: ti: phy-gmii-sel: Add bindings for J7200
TI's J7200 SoC supports additional PHY modes like QSGMII and SGMII
that are not supported on earlier SoCs. Add a compatible for it.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220912085650.83263-3-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
| -rw-r--r-- | Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml index 016a37db1ea1..da7cac537e15 100644 --- a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml +++ b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml @@ -53,12 +53,25 @@ properties: - ti,am43xx-phy-gmii-sel - ti,dm814-phy-gmii-sel - ti,am654-phy-gmii-sel + - ti,j7200-cpsw5g-phy-gmii-sel reg: maxItems: 1 '#phy-cells': true + ti,qsgmii-main-ports: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Required only for QSGMII mode. Array to select the port for + QSGMII main mode. Rest of the ports are selected as QSGMII_SUB + ports automatically. Any one of the 4 CPSW5G ports can act as the + main port with the rest of them being the QSGMII_SUB ports. + maxItems: 1 + items: + minimum: 1 + maximum: 4 + allOf: - if: properties: @@ -73,6 +86,18 @@ allOf: '#phy-cells': const: 1 description: CPSW port number (starting from 1) + + - if: + not: + properties: + compatible: + contains: + enum: + - ti,j7200-cpsw5g-phy-gmii-sel + then: + properties: + ti,qsgmii-main-ports: false + - if: properties: compatible: |