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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-12-25 12:59:44 +0100 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2023-01-13 23:48:25 +0530 |
| commit | e43ddd0ec2b8d1f01a9b63a8760ae7b74ad7b0c9 (patch) | |
| tree | de3305460b4eefb7f523f4284e39490f28d803b5 /Documentation/devicetree/bindings/phy | |
| parent | 9fd4dcd9793d9c2ad423bf117ac0da8a8d7c3351 (diff) | |
| download | linux-stable-e43ddd0ec2b8d1f01a9b63a8760ae7b74ad7b0c9.tar.gz linux-stable-e43ddd0ec2b8d1f01a9b63a8760ae7b74ad7b0c9.tar.bz2 linux-stable-e43ddd0ec2b8d1f01a9b63a8760ae7b74ad7b0c9.zip | |
dt-bindings: phy: qcom,sc7180-qmp-usb3-dp-phy: correct clocks per variants
Different variants of Qualcomm USB3 DP PHY take different clocks
(according to upstream DTS and Linux driver):
sc7280-herobrine-crd.dtb: phy-wrapper@88e9000: clocks: [[43, 151], [39, 0], [43, 153]] is too short
sc7280-herobrine-crd.dtb: phy-wrapper@88e9000: clock-names:1: 'cfg_ahb' was expected
...
sm8250-hdk.dtb: phy@88e9000: clocks: [[46, 185], [44, 0], [46, 187]] is too short
sm8250-hdk.dtb: phy@88e9000: clock-names:1: 'cfg_ahb' was expected
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221225115944.55425-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
| -rw-r--r-- | Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml | 72 |
1 files changed, 62 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml index 97d94c685d7b..2e19a434c669 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml @@ -51,18 +51,12 @@ properties: ranges: true clocks: - items: - - description: Phy aux clock. - - description: Phy config clock. - - description: 19.2 MHz ref clk. - - description: Phy common block aux clock. + minItems: 3 + maxItems: 4 clock-names: - items: - - const: aux - - const: cfg_ahb - - const: ref - - const: com_aux + minItems: 3 + maxItems: 4 power-domains: maxItems: 1 @@ -171,6 +165,64 @@ required: - vdda-phy-supply - vdda-pll-supply +allOf: + - if: + properties: + compatible: + enum: + - qcom,sc7180-qmp-usb3-dp-phy + - qcom,sdm845-qmp-usb3-dp-phy + then: + properties: + clocks: + items: + - description: Phy aux clock + - description: Phy config clock + - description: 19.2 MHz ref clk + - description: Phy common block aux clock + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + - const: com_aux + + - if: + properties: + compatible: + enum: + - qcom,sc8180x-qmp-usb3-dp-phy + then: + properties: + clocks: + items: + - description: Phy aux clock + - description: 19.2 MHz ref clk + - description: Phy common block aux clock + clock-names: + items: + - const: aux + - const: ref + - const: com_aux + + - if: + properties: + compatible: + enum: + - qcom,sm8250-qmp-usb3-dp-phy + then: + properties: + clocks: + items: + - description: Phy aux clock + - description: Board XO source + - description: Phy common block aux clock + clock-names: + items: + - const: aux + - const: ref_clk_src + - const: com_aux + additionalProperties: false examples: |