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author | Olof Johansson <olof@lixom.net> | 2015-12-22 12:17:48 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2015-12-22 12:17:48 -0800 |
commit | 8eb1f10ee94abc4d6cd4bd4a3e4f240ec0054ba8 (patch) | |
tree | 634519b795cba362f25875229da874ea7f947f22 /Documentation/devicetree/bindings/soc | |
parent | 960ac2dbeedee2d5b447037a54a8e18299f09860 (diff) | |
parent | 4add1074576758fb23b7369ea62de09dac16561e (diff) | |
download | linux-stable-8eb1f10ee94abc4d6cd4bd4a3e4f240ec0054ba8.tar.gz linux-stable-8eb1f10ee94abc4d6cd4bd4a3e4f240ec0054ba8.tar.bz2 linux-stable-8eb1f10ee94abc4d6cd4bd4a3e4f240ec0054ba8.zip |
Merge tag 'qcom-dt-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Qualcomm ARM Based Device Tree Updates for v4.5
* Add support for Sony Xperia Z
* Updates for Sony Honami board
* Updates for APQ8064 generic platform
* Updates for MSM8974 generic platform
* Add fixed rate oscillators for MSM8960 and APQ8064
* Add documentation for SMSM and SMP2P
* Fixup PMIC compat strings
* Add support for SMEM, RPM/SMD on APQ8084
* Fixup compat on IFC5640
* tag 'qcom-dt-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (24 commits)
arm: dts: Add support for PMA8084 on APQ8084
arm: dts: Add RPM/SMD support on APQ8084
arm: dts: Add APQ8084 SMEM nodes
ARM: dts: qcom: apq8064-ifc6410 Use hardware flow control for GSBI6
arm: dts: qcom: apq8064: Add fixed rate on-board oscillators
ARM: dts: qcom: msm8974: Add i2c8 node
ARM: dts: qcom: msm8974: Disable wled and move it to honami
arm: dts: qcom: Add generic PMIC gpio/MPP compat strings
arm: dts: qcom: Add aliases for PMICs
arm: dts: qcom: Update ifc6540 compat for qcom boot format
arm: dts: qcom: Add board clocks
ARM: dts: qcom: apq8064: Introduce Sony Xperia Z dts
ARM: dts: qcom: apq8064: Introduce gsbi5 and gsbi5 serial node
ARM: dts: qcom: apq8064: Declare all pm8921 regulators
ARM: dts: qcom: apq8064: Add hwmutex and SMEM nodes
dt-binding: soc: qcom: Introduce qcom, smp2p binding documentation
dt-binding: soc: qcom: Add Qualcomm SMSM device tree documentation
devicetree: Add hardware rng entry to qcom-apq8064.dtsi
ARM: dts: qcom: msm8974-honami: Specify charging parameters
ARM: dts: qcom: msm8974-honami: Add uSD slot nodes
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/devicetree/bindings/soc')
-rw-r--r-- | Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt | 104 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt | 104 |
2 files changed, 208 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt new file mode 100644 index 000000000000..5cc82b8353d8 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt @@ -0,0 +1,104 @@ +Qualcomm Shared Memory Point 2 Point binding + +The Shared Memory Point to Point (SMP2P) protocol facilitates communication of +a single 32-bit value between two processors. Each value has a single writer +(the local side) and a single reader (the remote side). Values are uniquely +identified in the system by the directed edge (local processor ID to remote +processor ID) and a string identifier. + +- compatible: + Usage: required + Value type: <string> + Definition: must be one of: + "qcom,smp2p" + +- interrupts: + Usage: required + Value type: <prop-encoded-array> + Definition: one entry specifying the smp2p notification interrupt + +- qcom,ipc: + Usage: required + Value type: <prop-encoded-array> + Definition: three entries specifying the outgoing ipc bit used for + signaling the remote end of the smp2p edge: + - phandle to a syscon node representing the apcs registers + - u32 representing offset to the register within the syscon + - u32 representing the ipc bit within the register + +- qcom,smem: + Usage: required + Value type: <u32 array> + Definition: two identifiers of the inbound and outbound smem items used + for this edge + +- qcom,local-pid: + Usage: required + Value type: <u32> + Definition: specifies the identfier of the local endpoint of this edge + +- qcom,remote-pid: + Usage: required + Value type: <u32> + Definition: specifies the identfier of the remote endpoint of this edge + += SUBNODES +Each SMP2P pair contain a set of inbound and outbound entries, these are +described in subnodes of the smp2p device node. The node names are not +important. + +- qcom,entry-name: + Usage: required + Value type: <string> + Definition: specifies the name of this entry, for inbound entries this + will be used to match against the remotely allocated entry + and for outbound entries this name is used for allocating + entries + +- interrupt-controller: + Usage: required for incoming entries + Value type: <empty> + Definition: marks the entry as inbound; the node should be specified + as a two cell interrupt-controller as defined in + "../interrupt-controller/interrupts.txt" + If not specified this node will denote the outgoing entry + +- #interrupt-cells: + Usage: required for incoming entries + Value type: <u32> + Definition: must be 2 - denoting the bit in the entry and IRQ flags + +- #qcom,state-cells: + Usage: required for outgoing entries + Value type: <u32> + Definition: must be 1 - denoting the bit in the entry + += EXAMPLE +The following example shows the SMP2P setup with the wireless processor, +defined from the 8974 apps processor's point-of-view. It encompasses one +inbound and one outbound entry: + +wcnss-smp2p { + compatible = "qcom,smp2p"; + qcom,smem = <431>, <451>; + + interrupts = <0 143 1>; + + qcom,ipc = <&apcs 8 18>; + + qcom,local-pid = <0>; + qcom,remote-pid = <4>; + + wcnss_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + + #qcom,state-cells = <1>; + }; + + wcnss_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt new file mode 100644 index 000000000000..a6634c70850d --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt @@ -0,0 +1,104 @@ +Qualcomm Shared Memory State Machine + +The Shared Memory State Machine facilitates broadcasting of single bit state +information between the processors in a Qualcomm SoC. Each processor is +assigned 32 bits of state that can be modified. A processor can through a +matrix of bitmaps signal subscription of notifications upon changes to a +certain bit owned by a certain remote processor. + +- compatible: + Usage: required + Value type: <string> + Definition: must be one of: + "qcom,smsm" + +- qcom,ipc-N: + Usage: required + Value type: <prop-encoded-array> + Definition: three entries specifying the outgoing ipc bit used for + signaling the N:th remote processor + - phandle to a syscon node representing the apcs registers + - u32 representing offset to the register within the syscon + - u32 representing the ipc bit within the register + +- qcom,local-host: + Usage: optional + Value type: <u32> + Definition: identifier of the local processor in the list of hosts, or + in other words specifier of the column in the subscription + matrix representing the local processor + defaults to host 0 + +- #address-cells: + Usage: required + Value type: <u32> + Definition: must be 1 + +- #size-cells: + Usage: required + Value type: <u32> + Definition: must be 0 + += SUBNODES +Each processor's state bits are described by a subnode of the smsm device node. +Nodes can either be flagged as an interrupt-controller to denote a remote +processor's state bits or the local processors bits. The node names are not +important. + +- reg: + Usage: required + Value type: <u32> + Definition: specifies the offset, in words, of the first bit for this + entry + +- #qcom,state-cells: + Usage: required for local entry + Value type: <u32> + Definition: must be 1 - denotes bit number + +- interrupt-controller: + Usage: required for remote entries + Value type: <empty> + Definition: marks the entry as a interrupt-controller and the state bits + to belong to a remote processor + +- #interrupt-cells: + Usage: required for remote entries + Value type: <u32> + Definition: must be 2 - denotes bit number and IRQ flags + +- interrupts: + Usage: required for remote entries + Value type: <prop-encoded-array> + Definition: one entry specifying remote IRQ used by the remote processor + to signal changes of its state bits + + += EXAMPLE +The following example shows the SMEM setup for controlling properties of the +wireless processor, defined from the 8974 apps processor's point-of-view. It +encompasses one outbound entry and the outgoing interrupt for the wireless +processor. + +smsm { + compatible = "qcom,smsm"; + + #address-cells = <1>; + #size-cells = <0>; + + qcom,ipc-3 = <&apcs 8 19>; + + apps_smsm: apps@0 { + reg = <0>; + + #qcom,state-cells = <1>; + }; + + wcnss_smsm: wcnss@7 { + reg = <7>; + interrupts = <0 144 1>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; |