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| author | Marek Vasut <marex@denx.de> | 2023-07-25 00:24:17 +0200 |
|---|---|---|
| committer | Mathieu Poirier <mathieu.poirier@linaro.org> | 2023-07-27 10:44:11 -0600 |
| commit | 05117bafbd6cdbd5639d5f02d298731e16444d7c (patch) | |
| tree | ec694143e3b37a7b2ed9a4e8fb9098a026403d6e /Documentation/devicetree/bindings | |
| parent | 7784311cad42e67a1a51a9d1b961752c0f9b7200 (diff) | |
| download | linux-stable-05117bafbd6cdbd5639d5f02d298731e16444d7c.tar.gz linux-stable-05117bafbd6cdbd5639d5f02d298731e16444d7c.tar.bz2 linux-stable-05117bafbd6cdbd5639d5f02d298731e16444d7c.zip | |
dt-bindings: remoteproc: imx_rproc: Support i.MX8MN/P MMIO
The MX8M CM7 boot via SMC call is problematic, since not all versions
of ATF support this interface. Document MMIO support used to boot the
CM7 on MX8MN/MP instead and discern MMIO interface using DT compatible
string. Document GPR register syscon phandle which is required by the
MMIO interface too.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230724222418.163220-1-marex@denx.de
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml index 0c3910f152d1..30632efdad8b 100644 --- a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml @@ -20,7 +20,9 @@ properties: - fsl,imx7ulp-cm4 - fsl,imx8mm-cm4 - fsl,imx8mn-cm7 + - fsl,imx8mn-cm7-mmio - fsl,imx8mp-cm7 + - fsl,imx8mp-cm7-mmio - fsl,imx8mq-cm4 - fsl,imx8qm-cm4 - fsl,imx8qxp-cm4 @@ -70,6 +72,11 @@ properties: description: Specify CPU entry address for SCU enabled processor. + fsl,iomuxc-gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit. + fsl,resource-id: $ref: /schemas/types.yaml#/definitions/uint32 description: @@ -79,6 +86,19 @@ properties: required: - compatible +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - fsl,imx8mn-cm7-mmio + - fsl,imx8mp-cm7-mmio + then: + properties: + fsl,iomuxc-gpr: false + additionalProperties: false examples: |