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authorAndre Przywara <andre.przywara@arm.com>2021-08-02 01:39:42 +0100
committerLee Jones <lee.jones@linaro.org>2021-08-02 08:40:07 +0100
commit614e1bb5305e82f968306bcf63be01693ac82a1f (patch)
tree96ab059154b2f310f047afcb50c443ee7f9e1913 /Documentation/devicetree/bindings
parent32979fcf5ab5df9359b98796886c5356b9cf4298 (diff)
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dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ)
The AXP305 PMIC used on many boards with the H616 SoC seems to be fully compatible to the AXP805 PMIC, so add the proper chain of compatible strings. Also at least on one board (Orangepi Zero2) there is no interrupt line connected to the CPU, so make the "interrupts" property optional. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/mfd/axp20x.txt3
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index 4991a6415796..2b53dcc0ea61 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -26,10 +26,10 @@ Required properties:
* "x-powers,axp803"
* "x-powers,axp806"
* "x-powers,axp805", "x-powers,axp806"
+ * "x-powers,axp305", "x-powers,axp805", "x-powers,axp806"
* "x-powers,axp809"
* "x-powers,axp813"
- reg: The I2C slave address or RSB hardware address for the AXP chip
-- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
- interrupt-controller: The PMIC has its own internal IRQs
- #interrupt-cells: Should be set to 1
@@ -43,6 +43,7 @@ more information:
AXP20x/LDO3: software-based implementation
Optional properties:
+- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
- x-powers,dcdc-freq: defines the work frequency of DC-DC in KHz
AXP152/20X: range: 750-1875, Default: 1.5 MHz
AXP22X/8XX: range: 1800-4050, Default: 3 MHz