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authorShenwei Wang <shenwei.wang@nxp.com>2022-08-12 08:30:11 -0500
committerBartosz Golaszewski <brgl@bgdev.pl>2022-08-31 17:20:54 +0200
commit3bdd1afa3e223f99bfb5fa5051da843dff7eca12 (patch)
treeb789fca43837ca6f0a79de00e063f65021b50619 /Documentation/devicetree
parent2d6f58a1e9a001902a072d8f3d99c96b9c7a1454 (diff)
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dt-bindings: firmware: imx: Add imx-scu gpio node
Add the description for imx-scu gpio subnode. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/firmware/fsl,scu.yaml5
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml
index b40b0ef56978..557e524786c2 100644
--- a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml
+++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml
@@ -30,6 +30,11 @@ properties:
Clock controller node that provides the clocks controlled by the SCU
$ref: /schemas/clock/fsl,scu-clk.yaml
+ gpio:
+ description:
+ Control the GPIO PINs on SCU domain over the firmware APIs
+ $ref: /schemas/gpio/fsl,imx8qxp-sc-gpio.yaml
+
ocotp:
description:
OCOTP controller node provided by the SCU