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author | Luis Oliveira <Luis.Oliveira@synopsys.com> | 2019-07-23 17:17:27 +0200 |
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committer | Philipp Zabel <p.zabel@pengutronix.de> | 2019-08-06 15:28:30 +0200 |
commit | e7ef681a8ab8568100eedac1d50fe5973178147b (patch) | |
tree | f918e0a2540e0731bbd06b4bd76aef0323c74dfb /Documentation/devicetree | |
parent | fb0d72c7ac5d1a3578e15cb56b4f453730790ba6 (diff) | |
download | linux-stable-e7ef681a8ab8568100eedac1d50fe5973178147b.tar.gz linux-stable-e7ef681a8ab8568100eedac1d50fe5973178147b.tar.bz2 linux-stable-e7ef681a8ab8568100eedac1d50fe5973178147b.zip |
dt-bindings: Document the DesignWare IP reset bindings
This adds documentation of device tree bindings for the
DesignWare IP reset controller.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Luis Oliveira <luis.oliveira@synopsys.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/reset/snps,dw-reset.txt | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/snps,dw-reset.txt b/Documentation/devicetree/bindings/reset/snps,dw-reset.txt new file mode 100644 index 000000000000..f94f911dd98d --- /dev/null +++ b/Documentation/devicetree/bindings/reset/snps,dw-reset.txt @@ -0,0 +1,30 @@ +Synopsys DesignWare Reset controller +======================================= + +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +Required properties: + +- compatible: should be one of the following. + "snps,dw-high-reset" - for active high configuration + "snps,dw-low-reset" - for active low configuration + +- reg: physical base address of the controller and length of memory mapped + region. + +- #reset-cells: must be 1. + +example: + + dw_rst_1: reset-controller@0000 { + compatible = "snps,dw-high-reset"; + reg = <0x0000 0x4>; + #reset-cells = <1>; + }; + + dw_rst_2: reset-controller@1000 {i + compatible = "snps,dw-low-reset"; + reg = <0x1000 0x8>; + #reset-cells = <1>; + }; |