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| author | Anatolij Gustschin <agust@denx.de> | 2010-07-23 04:00:38 +0000 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2010-08-01 17:06:44 -0600 |
| commit | a027b33348df3512d7680eed29bada1247f01ad7 (patch) | |
| tree | 665b11497f38e6a308afc3e955b377980690e960 /Documentation/powerpc | |
| parent | 4b5006ec7bb73cd9d4c8a723d484b4c87fad4123 (diff) | |
| download | linux-stable-a027b33348df3512d7680eed29bada1247f01ad7.tar.gz linux-stable-a027b33348df3512d7680eed29bada1247f01ad7.tar.bz2 linux-stable-a027b33348df3512d7680eed29bada1247f01ad7.zip | |
powerpc/5121: doc/dts-bindings: update doc of FSL DIU bindings
Update compatible and interrupt properties description.
Furthermore an example for the MPC5121 has been added.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'Documentation/powerpc')
| -rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/diu.txt | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/powerpc/dts-bindings/fsl/diu.txt index deb35de70988..326cddfd7c25 100644 --- a/Documentation/powerpc/dts-bindings/fsl/diu.txt +++ b/Documentation/powerpc/dts-bindings/fsl/diu.txt @@ -4,10 +4,12 @@ The Freescale DIU is a LCD controller, with proper hardware, it can also drive DVI monitors. Required properties: -- compatible : should be "fsl-diu". +- compatible : should be "fsl,diu" or "fsl,mpc5121-diu". - reg : should contain at least address and length of the DIU register set. -- Interrupts : one DIU interrupt should be describe here. +- interrupts : one DIU interrupt should be described here. +- interrupt-parent : the phandle for the interrupt controller that + services interrupts for this device. Example (MPC8610HPCD): display@2c000 { @@ -16,3 +18,11 @@ Example (MPC8610HPCD): interrupts = <72 2>; interrupt-parent = <&mpic>; }; + +Example for MPC5121: + display@2100 { + compatible = "fsl,mpc5121-diu"; + reg = <0x2100 0x100>; + interrupts = <64 0x8>; + interrupt-parent = <&ipic>; + }; |