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| author | Akhil P Oommen <akhilpo@codeaurora.org> | 2020-10-30 16:17:12 +0530 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2020-11-05 08:39:57 -0800 |
| commit | 06d65ba3db67618c0afd70a72df516dace49e7e7 (patch) | |
| tree | eebdd86826c030eefd6a27ba6977ea6882a99715 /Documentation | |
| parent | ec793cf01d1fe7f2d3eef30a0accfb3ca880abe4 (diff) | |
| download | linux-stable-06d65ba3db67618c0afd70a72df516dace49e7e7.tar.gz linux-stable-06d65ba3db67618c0afd70a72df516dace49e7e7.tar.bz2 linux-stable-06d65ba3db67618c0afd70a72df516dace49e7e7.zip | |
dt-bindings: drm/msm/gpu: Add cooling device support
Add cooling device support to gpu. A cooling device is bound to a
thermal zone to allow thermal mitigation.
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/display/msm/gpu.txt | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt index 1af0ff102b50..090dcb3fc34d 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.txt +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt @@ -39,6 +39,10 @@ Required properties: a4xx Snapdragon SoCs. See Documentation/devicetree/bindings/sram/qcom,ocmem.yaml. +Optional properties: +- #cooling-cells: The value must be 2. For details, please refer + Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml. + Example 3xx/4xx: / { @@ -61,6 +65,7 @@ Example 3xx/4xx: power-domains = <&mmcc OXILICX_GDSC>; operating-points-v2 = <&gpu_opp_table>; iommus = <&gpu_iommu 0>; + #cooling-cells = <2>; }; gpu_sram: ocmem@fdd00000 { @@ -98,6 +103,8 @@ Example a6xx (with GMU): reg = <0x5000000 0x40000>, <0x509e000 0x10>; reg-names = "kgsl_3d0_reg_memory", "cx_mem"; + #cooling-cells = <2>; + /* * Look ma, no clocks! The GPU clocks and power are * controlled entirely by the GMU |