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author | Michel Pollet <michel.pollet@bp.renesas.com> | 2018-06-14 11:56:31 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-06-25 11:09:19 +0200 |
commit | e4b08e1f3e86a5acda93fc7adb014840af7248bb (patch) | |
tree | 91c7cc5f48d55d23c9fb76d823b85d57d9b48d8b /Documentation | |
parent | d467239f37c4e49158e0569a26c6a9c365ec5b61 (diff) | |
download | linux-stable-e4b08e1f3e86a5acda93fc7adb014840af7248bb.tar.gz linux-stable-e4b08e1f3e86a5acda93fc7adb014840af7248bb.tar.bz2 linux-stable-e4b08e1f3e86a5acda93fc7adb014840af7248bb.zip |
dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation
The Renesas R9A06G032 SYSCTRL node description.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.txt | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.txt b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.txt new file mode 100644 index 000000000000..d60b99756bb9 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.txt @@ -0,0 +1,43 @@ +* Renesas R9A06G032 SYSCTRL + +Required Properties: + + - compatible: Must be: + - "renesas,r9a06g032-sysctrl" + - reg: Base address and length of the SYSCTRL IO block. + - #clock-cells: Must be 1 + - clocks: References to the parent clocks: + - external 40mhz crystal. + - external (optional) 32.768khz + - external (optional) jtag input + - external (optional) RGMII_REFCLK + - clock-names: Must be: + clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; + +Examples +-------- + + - SYSCTRL node: + + sysctrl: system-controller@4000c000 { + compatible = "renesas,r9a06g032-sysctrl"; + reg = <0x4000c000 0x1000>; + #clock-cells = <1>; + + clocks = <&ext_mclk>, <&ext_rtc_clk>, + <&ext_jtag_clk>, <&ext_rgmii_ref>; + clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; + }; + + - Other nodes can use the clocks provided by SYSCTRL as in: + + #include <dt-bindings/clock/r9a06g032-sysctrl.h> + uart0: serial@40060000 { + compatible = "snps,dw-apb-uart"; + reg = <0x40060000 0x400>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&sysctrl R9A06G032_CLK_UART0>; + clock-names = "baudclk"; + }; |