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authorWolfram Sang <wsa+renesas@sang-engineering.com>2021-03-11 10:09:18 +0100
committerDaniel Lezcano <daniel.lezcano@linaro.org>2021-04-08 13:23:23 +0200
commitfe8324f37cfebf72e2669e97b9d76ea9794d2972 (patch)
treedad8d8cf44eb02f649a0ec1de41d803bb1c9a345 /Documentation
parent352408aff91d06fd2f0e35d52079bd0cd70cd29e (diff)
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dt-bindings: timer: renesas,cmt: Add r8a779a0 CMT support
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210311090918.2197-1-wsa+renesas@sang-engineering.com
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/timer/renesas,cmt.yaml2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
index 428db3a21bb9..363ec28e07da 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
@@ -79,6 +79,7 @@ properties:
- renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H
- renesas,r8a77990-cmt0 # 32-bit CMT0 on R-Car E3
- renesas,r8a77995-cmt0 # 32-bit CMT0 on R-Car D3
+ - renesas,r8a779a0-cmt0 # 32-bit CMT0 on R-Car V3U
- const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2
- items:
@@ -94,6 +95,7 @@ properties:
- renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H
- renesas,r8a77990-cmt1 # 48-bit CMT on R-Car E3
- renesas,r8a77995-cmt1 # 48-bit CMT on R-Car D3
+ - renesas,r8a779a0-cmt1 # 48-bit CMT on R-Car V3U
- const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2
reg: