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| author | Masahiro Yamada <masahiroy@kernel.org> | 2022-08-20 18:15:30 +0900 |
|---|---|---|
| committer | Masahiro Yamada <masahiroy@kernel.org> | 2022-09-29 04:40:14 +0900 |
| commit | d724b578a1f746db6fc1fd5e4cbba554a855dc8d (patch) | |
| tree | 1a5dcc8f9971cc822ac1e3c8e94d98924c5a9a7f /Makefile | |
| parent | b10fdeea8cf42c0d97b337e9e501c92da4389a03 (diff) | |
| download | linux-stable-d724b578a1f746db6fc1fd5e4cbba554a855dc8d.tar.gz linux-stable-d724b578a1f746db6fc1fd5e4cbba554a855dc8d.tar.bz2 linux-stable-d724b578a1f746db6fc1fd5e4cbba554a855dc8d.zip | |
kbuild: do not deduplicate modules.order
The AWK code was added to deduplicate modules.order in case $(obj-m)
contains the same module multiple times, but it is actually unneeded
since commit b2c885549122 ("kbuild: update modules.order only when
contained modules are updated").
The list is already deduplicated before being processed by AWK because
$^ is the deduplicated list of prerequisites.
(Please note the real-prereqs macro uses $^)
Yet, modules.order will contain duplication if two different Makefiles
build the same module:
foo/Makefile:
obj-m += bar/baz.o
foo/bar/Makefile:
obj-m += baz.o
However, the parallel builds cannot properly handle this case in the
first place. So, it is better to let it fail (as already done by
scripts/modules-check.sh).
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 5 |
1 files changed, 1 insertions, 4 deletions
@@ -1430,14 +1430,11 @@ endif # Build modules # -# A module can be listed more than once in obj-m resulting in -# duplicate lines in modules.order files. Those are removed -# using awk while concatenating to the final file. PHONY += modules modules: $(if $(KBUILD_BUILTIN),vmlinux) modules_check modules_prepare -cmd_modules_order = $(AWK) '!x[$$0]++' $(real-prereqs) > $@ +cmd_modules_order = cat $(real-prereqs) > $@ modules.order: $(subdir-modorder) FORCE $(call if_changed,modules_order) |