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authorChristoffer Dall <christoffer.dall@arm.com>2019-12-12 20:50:55 +0100
committerBen Hutchings <ben@decadent.org.uk>2020-05-22 21:19:29 +0100
commit6a73af05d634d774f72ea41f9518c777743726bc (patch)
treeabf24a96fd7972425ca1db5a358f794bb348ea7e /arch/Kconfig
parent1b0d263daed194db05df28a2a10e39fea767fcc1 (diff)
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KVM: arm64: Only sign-extend MMIO up to register width
commit b6ae256afd32f96bec0117175b329d0dd617655e upstream. On AArch64 you can do a sign-extended load to either a 32-bit or 64-bit register, and we should only sign extend the register up to the width of the register as specified in the operation (by using the 32-bit Wn or 64-bit Xn register specifier). As it turns out, the architecture provides this decoding information in the SF ("Sixty-Four" -- how cute...) bit. Let's take advantage of this with the usual 32-bit/64-bit header file dance and do the right thing on AArch64 hosts. Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20191212195055.5541-1-christoffer.dall@arm.com [bwh: Backported to 3.16: - Use ESR_EL2_SF - Adjust filename, context] Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
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