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| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2017-08-15 21:13:53 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2017-09-01 11:26:26 -0700 |
| commit | bee91c3a3ce63daf64bb53ae60e6a2fb2961d3d7 (patch) | |
| tree | 06d55b2574b1eebbdd5e12e4a56da04f9a9e9806 /arch/arc/mm | |
| parent | 0fa400cb8a90753044bbcb5810fa1a59d96d5ea1 (diff) | |
| download | linux-stable-bee91c3a3ce63daf64bb53ae60e6a2fb2961d3d7.tar.gz linux-stable-bee91c3a3ce63daf64bb53ae60e6a2fb2961d3d7.tar.bz2 linux-stable-bee91c3a3ce63daf64bb53ae60e6a2fb2961d3d7.zip | |
ARCv2: IOC: Tighten up the contraints (specifically base / size alignment)
[Needed for HSDK]
- Currently IOC base is hardcoded to 0x8000_0000 which is default value
of LINUX_LINK_BASE, but may not always be the case
- IOC programming model imposes the constraint that IOC aperture size
needs to be aligned to IOC base address, which we were not checking
so far.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
[vgupta: reworked the changelog]
Diffstat (limited to 'arch/arc/mm')
| -rw-r--r-- | arch/arc/mm/cache.c | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c index ad498e58a1fe..d68d36c15909 100644 --- a/arch/arc/mm/cache.c +++ b/arch/arc/mm/cache.c @@ -1147,7 +1147,7 @@ SYSCALL_DEFINE3(cacheflush, uint32_t, start, uint32_t, sz, uint32_t, flags) */ noinline void __init arc_ioc_setup(void) { - unsigned int ap_sz; + unsigned int ioc_base, mem_sz; /* Flush + invalidate + disable L1 dcache */ __dc_disable(); @@ -1156,18 +1156,29 @@ noinline void __init arc_ioc_setup(void) if (read_aux_reg(ARC_REG_SLC_BCR)) slc_entire_op(OP_FLUSH_N_INV); - /* IOC Aperture start: TDB: handle non default CONFIG_LINUX_LINK_BASE */ - write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000); - /* - * IOC Aperture size: - * decoded as 2 ^ (SIZE + 2) KB: so setting 0x11 implies 512M + * currently IOC Aperture covers entire DDR * TBD: fix for PGU + 1GB of low mem * TBD: fix for PAE */ - ap_sz = order_base_2(arc_get_mem_sz()/1024) - 2; - write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, ap_sz); + mem_sz = arc_get_mem_sz(); + + if (!is_power_of_2(mem_sz) || mem_sz < 4096) + panic("IOC Aperture size must be power of 2 larger than 4KB"); + + /* + * IOC Aperture size decoded as 2 ^ (SIZE + 2) KB, + * so setting 0x11 implies 512MB, 0x12 implies 1GB... + */ + write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, order_base_2(mem_sz >> 10) - 2); + + /* for now assume kernel base is start of IOC aperture */ + ioc_base = CONFIG_LINUX_LINK_BASE; + + if (ioc_base % mem_sz != 0) + panic("IOC Aperture start must be aligned to the size of the aperture"); + write_aux_reg(ARC_REG_IO_COH_AP0_BASE, ioc_base >> 12); write_aux_reg(ARC_REG_IO_COH_PARTIAL, 1); write_aux_reg(ARC_REG_IO_COH_ENABLE, 1); |