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author | Alexander Shiyan <shc_work@mail.ru> | 2014-02-22 13:32:34 +0400 |
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committer | Shawn Guo <shawn.guo@linaro.org> | 2014-02-24 11:05:05 +0800 |
commit | 9089ce520f6fdcb3c921a12d24834197251bd56f (patch) | |
tree | 6fef585294a1f93c8fe063a6be3ae82e0d0c9d3c /arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | |
parent | a2e502c214ae65a3e0871e6216f1bc105524d9ad (diff) | |
download | linux-stable-9089ce520f6fdcb3c921a12d24834197251bd56f.tar.gz linux-stable-9089ce520f6fdcb3c921a12d24834197251bd56f.tar.bz2 linux-stable-9089ce520f6fdcb3c921a12d24834197251bd56f.zip |
ARM: dts: imx27-phytec-phycore-rdk: Add USBH2 node
This patch adds USBH2 devicetree node of Phytec PCM970 RDK.
Additionally, adds fixed regulator to provide functionality
without dummy-regulator in the kernel.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts')
-rw-r--r-- | arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts index 9a0754300685..df3b2e731835 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts +++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts @@ -81,6 +81,23 @@ >; }; + pinctrl_usbh2: usbh2grp { + fsl,pins = < + MX27_PAD_USBH2_CLK__USBH2_CLK 0x0 + MX27_PAD_USBH2_DIR__USBH2_DIR 0x0 + MX27_PAD_USBH2_NXT__USBH2_NXT 0x0 + MX27_PAD_USBH2_STP__USBH2_STP 0x0 + MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0 + MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0 + MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0 + MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0 + MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0 + MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0 + MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0 + MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0 + >; + }; + pinctrl_weim: weimgrp { fsl,pins = < MX27_PAD_CS4_B__CS4_B 0x0 /* CS4 */ @@ -170,6 +187,20 @@ status = "okay"; }; +&usbh2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh2>; + dr_mode = "host"; + phy_type = "ulpi"; + vbus-supply = <®_5v0>; + disable-over-current; + status = "okay"; +}; + +&usbphy2 { + vcc-supply = <®_5v0>; +}; + &weim { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_weim>; |