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author | Rob Herring <robh@kernel.org> | 2023-05-04 18:38:52 -0500 |
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committer | Rob Herring <robh@kernel.org> | 2023-06-21 11:39:50 -0600 |
commit | 724ba6751532055db75992fc6ae21c3e322e94a7 (patch) | |
tree | c54cea784e2f7725fe18f8a5a234779b966d414a /arch/arm/boot/dts/nspire.dtsi | |
parent | 6a1d798feb65d2a67e6e2cafb0b0e4f430603226 (diff) | |
download | linux-stable-724ba6751532055db75992fc6ae21c3e322e94a7.tar.gz linux-stable-724ba6751532055db75992fc6ae21c3e322e94a7.tar.bz2 linux-stable-724ba6751532055db75992fc6ae21c3e322e94a7.zip |
ARM: dts: Move .dts files to vendor sub-directories
The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.
There's no change to dtbs_install as the flat structure is maintained on
install.
The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
company (e.g. gemini, nspire)
The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/nspire.dtsi')
-rw-r--r-- | arch/arm/boot/dts/nspire.dtsi | 203 |
1 files changed, 0 insertions, 203 deletions
diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi deleted file mode 100644 index bb240e6a3a6f..000000000000 --- a/arch/arm/boot/dts/nspire.dtsi +++ /dev/null @@ -1,203 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/boot/nspire.dtsi - * - * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> - */ - -/ { - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&intc>; - - cpus { - cpu@0 { - compatible = "arm,arm926ej-s"; - }; - }; - - bootrom: bootrom@0 { - reg = <0x00000000 0x80000>; - }; - - sram: sram@a4000000 { - device = "memory"; - reg = <0xa4000000 0x20000>; - }; - - timer_clk: timer_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - }; - - base_clk: base_clk { - #clock-cells = <0>; - reg = <0x900b0024 0x4>; - }; - - ahb_clk: ahb_clk { - #clock-cells = <0>; - reg = <0x900b0024 0x4>; - clocks = <&base_clk>; - }; - - apb_pclk: apb_pclk { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <2>; - clock-mult = <1>; - clocks = <&ahb_clk>; - }; - - usb_phy: usb_phy { - compatible = "usb-nop-xceiv"; - #phy-cells = <0>; - }; - - vbus_reg: vbus_reg { - compatible = "regulator-fixed"; - - regulator-name = "USB VBUS output"; - regulator-type = "voltage"; - - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - ahb { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - spi: spi@a9000000 { - reg = <0xa9000000 0x1000>; - }; - - usb0: usb@b0000000 { - compatible = "lsi,zevio-usb"; - reg = <0xb0000000 0x1000>; - interrupts = <8>; - - usb-phy = <&usb_phy>; - vbus-supply = <&vbus_reg>; - }; - - usb1: usb@b4000000 { - reg = <0xb4000000 0x1000>; - interrupts = <9>; - status = "disabled"; - }; - - lcd: lcd@c0000000 { - compatible = "arm,pl111", "arm,primecell"; - reg = <0xc0000000 0x1000>; - interrupts = <21>; - - /* - * We assume the same clock is fed to APB and CLCDCLK. - * There is some code to scale the clock down by a factor - * 48 for the display so likely the frequency to the - * display is 1MHz and the CLCDCLK is 48 MHz. - */ - clocks = <&apb_pclk>, <&apb_pclk>; - clock-names = "clcdclk", "apb_pclk"; - }; - - adc: adc@c4000000 { - reg = <0xc4000000 0x1000>; - interrupts = <11>; - }; - - tdes: crypto@c8010000 { - reg = <0xc8010000 0x1000>; - }; - - sha256: crypto@cc000000 { - reg = <0xcc000000 0x1000>; - }; - - apb@90000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - clock-ranges; - ranges; - - gpio: gpio@90000000 { - compatible = "lsi,zevio-gpio"; - reg = <0x90000000 0x1000>; - interrupts = <7>; - gpio-controller; - #gpio-cells = <2>; - }; - - fast_timer: timer@90010000 { - reg = <0x90010000 0x1000>; - interrupts = <17>; - }; - - uart: serial@90020000 { - reg = <0x90020000 0x1000>; - interrupts = <1>; - }; - - timer0: timer@900c0000 { - reg = <0x900c0000 0x1000>; - clocks = <&timer_clk>, <&timer_clk>, - <&timer_clk>; - clock-names = "timer0clk", "timer1clk", - "apb_pclk"; - }; - - timer1: timer@900d0000 { - reg = <0x900d0000 0x1000>; - interrupts = <19>; - clocks = <&timer_clk>, <&timer_clk>, - <&timer_clk>; - clock-names = "timer0clk", "timer1clk", - "apb_pclk"; - }; - - watchdog: watchdog@90060000 { - compatible = "arm,amba-primecell"; - reg = <0x90060000 0x1000>; - interrupts = <3>; - }; - - rtc: rtc@90090000 { - reg = <0x90090000 0x1000>; - interrupts = <4>; - }; - - misc: misc@900a0000 { - reg = <0x900a0000 0x1000>; - }; - - pwr: pwr@900b0000 { - reg = <0x900b0000 0x1000>; - interrupts = <15>; - }; - - keypad: input@900e0000 { - compatible = "ti,nspire-keypad"; - reg = <0x900e0000 0x1000>; - interrupts = <16>; - - scan-interval = <1000>; - row-delay = <200>; - - clocks = <&apb_pclk>; - }; - - contrast: contrast@900f0000 { - reg = <0x900f0000 0x1000>; - }; - - led: led@90110000 { - reg = <0x90110000 0x1000>; - }; - }; - }; -}; |