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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-05-06 18:21:05 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2022-08-29 16:16:11 -0500 |
| commit | f9aad4f098dc81b5859c27bfcf441cff418002a4 (patch) | |
| tree | f0fcad97da43eda8b8891c420072a028cddd3381 /arch/arm/boot/dts/qcom-ipq4019.dtsi | |
| parent | 47931796aad522f96df3620b8c387073d67c2332 (diff) | |
| download | linux-stable-f9aad4f098dc81b5859c27bfcf441cff418002a4.tar.gz linux-stable-f9aad4f098dc81b5859c27bfcf441cff418002a4.tar.bz2 linux-stable-f9aad4f098dc81b5859c27bfcf441cff418002a4.zip | |
ARM: dts: qcom: stop using snps,dw-pcie falback
Qualcomm PCIe devices are not really compatible with the snps,dw-pcie.
Unlike the generic IP core, they have special requirements regarding
enabling clocks, toggling resets, using the PHY, etc.
This is not to mention that platform snps-dw-pcie driver expects to find
two IRQs declared, while Qualcomm platforms use just one.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220506152107.1527552-7-dmitry.baryshkov@linaro.org
Diffstat (limited to 'arch/arm/boot/dts/qcom-ipq4019.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index bb307b8f678c..c07c8a791497 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -412,7 +412,7 @@ }; pcie0: pci@40000000 { - compatible = "qcom,pcie-ipq4019", "snps,dw-pcie"; + compatible = "qcom,pcie-ipq4019"; reg = <0x40000000 0xf1d 0x40000f20 0xa8 0x80000 0x2000 |