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| author | Christian Marangi <ansuelsmth@gmail.com> | 2022-07-07 03:09:36 +0200 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-07-16 21:43:45 -0500 |
| commit | d883a12a547b6d42e795ff3b5ac87cfd013b5423 (patch) | |
| tree | 5f102b1867f3b79347dafe32afcf5247a31b8bed /arch/arm/boot/dts/qcom-ipq8064.dtsi | |
| parent | 4af1defb305798d1a064a5ea0d0c9b30e5eee185 (diff) | |
| download | linux-stable-d883a12a547b6d42e795ff3b5ac87cfd013b5423.tar.gz linux-stable-d883a12a547b6d42e795ff3b5ac87cfd013b5423.tar.bz2 linux-stable-d883a12a547b6d42e795ff3b5ac87cfd013b5423.zip | |
ARM: dts: qcom: ipq8064: add gsbi6 missing definition
Add gsbi6 missing definition for ipq8064.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-3-ansuelsmth@gmail.com
Diffstat (limited to 'arch/arm/boot/dts/qcom-ipq8064.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom-ipq8064.dtsi | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index bc9987c841d0..7cccfe99bf00 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -663,6 +663,49 @@ }; }; + gsbi6: gsbi@16500000 { + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x16500000 0x100>; + cell-index = <6>; + clocks = <&gcc GSBI6_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + syscon-tcsr = <&tcsr>; + + status = "disabled"; + + gsbi6_i2c: i2c@16580000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x16580000 0x1000>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + gsbi6_spi: spi@16580000 { + compatible = "qcom,spi-qup-v1.1.1"; + reg = <0x16580000 0x1000>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + }; + gsbi7: gsbi@16600000 { status = "disabled"; compatible = "qcom,gsbi-v1.0.0"; |