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authorHerve Codina <herve.codina@bootlin.com>2022-04-29 15:41:43 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-05-06 11:09:34 +0200
commitfcb3083968df0addf6fb0b452d6e29be756ea943 (patch)
tree02499384c2aa4a2eb060eff7ae9d27303f68e591 /arch/arm/boot/dts/r9a06g032.dtsi
parent47f02f883883d6e318a06cb7c05c8a7bed2c17ce (diff)
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ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY
Describe the PCI USB devices that are behind the PCI bridge, adding necessary links to the USB PHY device. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20220429134143.628428-8-herve.codina@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm/boot/dts/r9a06g032.dtsi')
-rw-r--r--arch/arm/boot/dts/r9a06g032.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
index b94a4a36c41b..d3665910958b 100644
--- a/arch/arm/boot/dts/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/r9a06g032.dtsi
@@ -144,6 +144,18 @@
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@1,0 {
+ reg = <0x800 0 0 0 0>;
+ phys = <&usbphy>;
+ phy-names = "usb";
+ };
+
+ usb@2,0 {
+ reg = <0x1000 0 0 0 0>;
+ phys = <&usbphy>;
+ phy-names = "usb";
+ };
};
uart0: serial@40060000 {