diff options
author | Arnd Bergmann <arnd@arndb.de> | 2023-08-21 21:23:53 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2023-08-21 21:25:23 -0400 |
commit | aa2951a8fa3a0e18db894285cdf7ba0d06ad6664 (patch) | |
tree | 42e1bd1e55667dd056b9967ae1d248f28bb3dd6a /arch/arm/boot/dts/st | |
parent | 1298d0dd31b2d78b352ff59999a0057bd8c891f7 (diff) | |
parent | 4c757f6b8026f7d65bbcd2b821651848a074a12b (diff) | |
download | linux-stable-aa2951a8fa3a0e18db894285cdf7ba0d06ad6664.tar.gz linux-stable-aa2951a8fa3a0e18db894285cdf7ba0d06ad6664.tar.bz2 linux-stable-aa2951a8fa3a0e18db894285cdf7ba0d06ad6664.zip |
Merge tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.6, round 1
Highlights:
----------
- MCU:
- Add CAN support on stm32f746.
- Add touchscreen support (edt-ft5306) on stm32f746-disco.
- Add support to Rocktech RK043FN48H display on stm32f746-disco
board.
- Add gpio-ranges for stm32f7 to fix boot issue.
- MPU:
- STM32MP13:
- Remove shmem for scmi-optee to match with OP-TEE configuration.
- Enable OP-TEE asynchronous notification by using PPI#15.
- Expose and use SCMI regulators on stm32mp135f-dk.
- STMP32MP15:
- Remove shmem for scmi-optee to match with OPTEE configuration
- Deduplicate DSI node to fix #address-cells/#size-cells issue on
boards using it.
- ST:
- Fix dts check warnings on stm32mp15-scmi boards.
- DH:
- Add missing detach mailbox for DHCOM and DHCOR SoM.
- Odyssey:
- Add missing detach mailbox for Odyssey SoM.
- OCTAVO:
- Add Linux Automation Test Automation Controller (LXA TAC) based
on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
DSA-capable ETH switch (2 ports), dual CAN...
It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
on STM32MP157.
- PROTONIC:
- Add Power over Data Line (PoDL) Power Source Equipment (PSE)
regulator nodes on PRTT1C board. It allows power delivery and
data transmission over a single twisted pair.
* tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (29 commits)
ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
ARM: dts: stm32: support display on stm32f746-disco board
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
ARM: dts: stm32: add pin map for LTDC on stm32f7
ARM: dts: stm32: add ltdc support on stm32f746 MCU
ARM: dts: st: Add gpio-ranges for stm32f769-pinctrl
ARM: dts: st: Add gpio-ranges for stm32f746-pinctrl
ARM: dts: st: stm32mp157c-emstamp: correct regulator-active-discharge
ARM: dts: st: stm32mp157c-emstamp: drop incorrect vref_ddr property
ARM: dts: stm32: fix dts check warnings on stm32mp15-scmi
ARM: dts: stm32: Add missing detach mailbox for DHCOR SoM
ARM: dts: stm32: Add missing detach mailbox for DHCOM SoM
ARM: dts: stm32: Add missing detach mailbox for Odyssey SoM
ARM: dts: stm32: Add missing detach mailbox for emtrion emSBC-Argon
ARM: dts: stm32: prtt1c: Add PoDL PSE regulator nodes
ARM: dts: stm32: add touchscreen on stm32f746-disco board
ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
ARM: dts: stm32: re-add CAN support on stm32f746
...
Link: https://lore.kernel.org/r/c0524a16-ab27-0cb5-8e7b-c12f7bde7e0d@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/st')
23 files changed, 1410 insertions, 189 deletions
diff --git a/arch/arm/boot/dts/st/Makefile b/arch/arm/boot/dts/st/Makefile index b3e9d29390e3..44b264c399ec 100644 --- a/arch/arm/boot/dts/st/Makefile +++ b/arch/arm/boot/dts/st/Makefile @@ -56,6 +56,8 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32mp157c-ev1.dtb \ stm32mp157c-ev1-scmi.dtb \ stm32mp157c-lxa-mc1.dtb \ + stm32mp157c-lxa-tac-gen1.dtb \ + stm32mp157c-lxa-tac-gen2.dtb \ stm32mp157c-odyssey.dtb \ stm32mp157c-phycore-stm32mp1-3.dtb dtb-$(CONFIG_ARCH_U8500) += \ diff --git a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi index 9f65403295ca..65480a9f5cc4 100644 --- a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi @@ -171,6 +171,16 @@ }; }; + i2c3_pins_a: i2c3-0 { + pins { + pinmux = <STM32_PINMUX('H', 8, AF4)>, /* I2C3_SDA */ + <STM32_PINMUX('H', 7, AF4)>; /* I2C3_SCL */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */ @@ -365,6 +375,41 @@ bias-pull-up; }; }; + + + ltdc_pins_a: ltdc-0 { + pins { + pinmux = <STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */ + <STM32_PINMUX('G',12, AF9)>, /* LCD_B4 */ + <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ + <STM32_PINMUX('I',10, AF14)>, /* LCD_HSYNC */ + <STM32_PINMUX('I',14, AF14)>, /* LCD_CLK */ + <STM32_PINMUX('I',15, AF14)>, /* LCD_R0 */ + <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */ + <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */ + <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */ + <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */ + <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */ + <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */ + <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */ + <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */ + <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */ + <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */ + <STM32_PINMUX('J',10, AF14)>, /* LCD_G3 */ + <STM32_PINMUX('J',11, AF14)>, /* LCD_G4 */ + <STM32_PINMUX('J',13, AF14)>, /* LCD_B1 */ + <STM32_PINMUX('J',14, AF14)>, /* LCD_B2 */ + <STM32_PINMUX('J',15, AF14)>, /* LCD_B3 */ + <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */ + <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */ + <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */ + <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */ + <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */ + <STM32_PINMUX('K', 6, AF14)>, /* LCD_B7 */ + <STM32_PINMUX('K', 7, AF14)>; /* LCD_DE */ + slew-rate = <2>; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/st/stm32f746-disco.dts b/arch/arm/boot/dts/st/stm32f746-disco.dts index c11616ed5fc6..37e3a905fc3c 100644 --- a/arch/arm/boot/dts/st/stm32f746-disco.dts +++ b/arch/arm/boot/dts/st/stm32f746-disco.dts @@ -43,8 +43,9 @@ /dts-v1/; #include "stm32f746.dtsi" #include "stm32f746-pinctrl.dtsi" -#include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> / { model = "STMicroelectronics STM32F746-DISCO board"; @@ -60,6 +61,19 @@ reg = <0xC0000000 0x800000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + no-map; + size = <0x80000>; + linux,dma-default; + }; + }; + aliases { serial0 = &usart1; }; @@ -79,12 +93,31 @@ regulator-always-on; }; - mmc_vcard: mmc_vcard { + vcc_3v3: vcc-3v3 { compatible = "regulator-fixed"; - regulator-name = "mmc_vcard"; + regulator-name = "vcc_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + backlight: backlight { + compatible = "gpio-backlight"; + gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + panel_rgb: panel-rgb { + compatible = "rocktech,rk043fn48h"; + power-supply = <&vcc_3v3>; + backlight = <&backlight>; + enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; }; &clk_hse { @@ -99,9 +132,37 @@ status = "okay"; }; +&i2c3 { + pinctrl-0 = <&i2c3_pins_a>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; + + touchscreen@38 { + compatible = "edt,edt-ft5306"; + reg = <0x38>; + interrupt-parent = <&gpioi>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <480>; + touchscreen-size-y = <272>; + }; +}; + +<dc { + pinctrl-0 = <<dc_pins_a>; + pinctrl-names = "default"; + status = "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; +}; + &sdio1 { status = "okay"; - vmmc-supply = <&mmc_vcard>; + vmmc-supply = <&vcc_3v3>; cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "opendrain"; pinctrl-0 = <&sdio_pins_a>; diff --git a/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi index 781197ef42d6..139f72b790c0 100644 --- a/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi @@ -8,4 +8,48 @@ &pinctrl { compatible = "st,stm32f746-pinctrl"; + + gpioa: gpio@40020000 { + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@40020400 { + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@40020800 { + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@40020c00 { + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@40021000 { + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@40021400 { + gpio-ranges = <&pinctrl 0 80 16>; + }; + + gpiog: gpio@40021800 { + gpio-ranges = <&pinctrl 0 96 16>; + }; + + gpioh: gpio@40021c00 { + gpio-ranges = <&pinctrl 0 112 16>; + }; + + gpioi: gpio@40022000 { + gpio-ranges = <&pinctrl 0 128 16>; + }; + + gpioj: gpio@40022400 { + gpio-ranges = <&pinctrl 0 144 16>; + }; + + gpiok: gpio@40022800 { + gpio-ranges = <&pinctrl 0 160 8>; + }; }; diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi index d1802efd067c..53a8e2dec9a4 100644 --- a/arch/arm/boot/dts/st/stm32f746.dtsi +++ b/arch/arm/boot/dts/st/stm32f746.dtsi @@ -257,6 +257,23 @@ status = "disabled"; }; + can3: can@40003400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40003400 0x200>; + interrupts = <104>, <105>, <106>, <107>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN3)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + st,gcan = <&gcan3>; + status = "disabled"; + }; + + gcan3: gcan@40003600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40003600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + }; + usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>; @@ -337,6 +354,36 @@ status = "disabled"; }; + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + st,can-primary; + st,gcan = <&gcan1>; + status = "disabled"; + }; + + gcan1: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>; + st,can-secondary; + st,gcan = <&gcan1>; + status = "disabled"; + }; + cec: cec@40006c00 { compatible = "st,stm32-cec"; reg = <0x40006C00 0x400>; @@ -507,6 +554,16 @@ }; }; + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + status = "disabled"; + }; + pwrcfg: power-config@40007000 { compatible = "st,stm32-power-config", "syscon"; reg = <0x40007000 0x400>; diff --git a/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi index c26abc04e2ce..02c2a8b08468 100644 --- a/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi @@ -8,4 +8,48 @@ &pinctrl { compatible = "st,stm32f769-pinctrl"; + + gpioa: gpio@40020000 { + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@40020400 { + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@40020800 { + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@40020c00 { + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@40021000 { + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@40021400 { + gpio-ranges = <&pinctrl 0 80 16>; + }; + + gpiog: gpio@40021800 { + gpio-ranges = <&pinctrl 0 96 16>; + }; + + gpioh: gpio@40021c00 { + gpio-ranges = <&pinctrl 0 112 16>; + }; + + gpioi: gpio@40022000 { + gpio-ranges = <&pinctrl 0 128 16>; + }; + + gpioj: gpio@40022400 { + gpio-ranges = <&pinctrl 0 144 16>; + }; + + gpiok: gpio@40022800 { + gpio-ranges = <&pinctrl 0 160 8>; + }; }; diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index d163c267e34c..ac90fcbf0c09 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -33,6 +33,8 @@ optee { method = "smc"; compatible = "linaro,optee-tz"; + interrupt-parent = <&intc>; + interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; }; scmi: scmi { @@ -40,7 +42,6 @@ #address-cells = <1>; #size-cells = <0>; linaro,optee-channel-id = <0>; - shmem = <&scmi_shm>; scmi_clk: protocol@14 { reg = <0x14>; @@ -51,6 +52,28 @@ reg = <0x16>; #reset-cells = <1>; }; + + scmi_voltd: protocol@17 { + reg = <0x17>; + + scmi_regu: regulators { + #address-cells = <1>; + #size-cells = <0>; + + scmi_reg11: regulator@0 { + reg = <VOLTD_SCMI_REG11>; + regulator-name = "reg11"; + }; + scmi_reg18: regulator@1 { + reg = <VOLTD_SCMI_REG18>; + regulator-name = "reg18"; + }; + scmi_usb33: regulator@2 { + reg = <VOLTD_SCMI_USB33>; + regulator-name = "usb33"; + }; + }; + }; }; }; @@ -77,28 +100,6 @@ always-on; }; - /* PWR 1v1, 1v8 and 3v3 regulators defined as fixed, waiting for SCMI */ - reg11: reg11 { - compatible = "regulator-fixed"; - regulator-name = "reg11"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - }; - - reg18: reg18 { - compatible = "regulator-fixed"; - regulator-name = "reg18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - usb33: usb33 { - compatible = "regulator-fixed"; - regulator-name = "usb33"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - soc { compatible = "simple-bus"; #address-cells = <1>; @@ -106,19 +107,6 @@ interrupt-parent = <&intc>; ranges; - scmi_sram: sram@2ffff000 { - compatible = "mmio-sram"; - reg = <0x2ffff000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2ffff000 0x1000>; - - scmi_shm: scmi-sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0 0x80>; - }; - }; - timers2: timer@40000000 { #address-cells = <1>; #size-cells = <0>; @@ -813,7 +801,7 @@ g-tx-fifo-size = <256 16 16 16 16 16 16 16>; dr_mode = "otg"; otg-rev = <0x200>; - usb33d-supply = <&usb33>; + usb33d-supply = <&scmi_usb33>; status = "disabled"; }; @@ -1343,8 +1331,8 @@ reg = <0x5a006000 0x1000>; clocks = <&rcc USBPHY_K>; resets = <&rcc USBPHY_R>; - vdda1v1-supply = <®11>; - vdda1v8-supply = <®18>; + vdda1v1-supply = <&scmi_reg11>; + vdda1v8-supply = <&scmi_reg18>; status = "disabled"; usbphyc_port0: usb-phy@0 { diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index f0900ca672b5..eea740d097c7 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -9,6 +9,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/leds/common.h> +#include <dt-bindings/regulator/st,stm32mp13-regulator.h> #include "stm32mp135.dtsi" #include "stm32mp13xf.dtsi" #include "stm32mp13-pinctrl.dtsi" @@ -65,45 +66,13 @@ default-state = "off"; }; }; - - v3v3_sw: v3v3-sw { - compatible = "regulator-fixed"; - regulator-name = "v3v3_sw"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_adc: vdd-adc { - compatible = "regulator-fixed"; - regulator-name = "vdd_adc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_sd: vdd-sd { - compatible = "regulator-fixed"; - regulator-name = "vdd_sd"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - regulator-always-on; - }; - - vdd_usb: vdd-usb { - compatible = "regulator-fixed"; - regulator-name = "vdd_usb"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; }; &adc_1 { pinctrl-names = "default"; pinctrl-0 = <&adc1_usb_cc_pins_a>; - vdda-supply = <&vdd_adc>; - vref-supply = <&vdd_adc>; + vdda-supply = <&scmi_vdd_adc>; + vref-supply = <&scmi_vdd_adc>; status = "okay"; adc1: adc@0 { status = "okay"; @@ -195,6 +164,29 @@ status = "okay"; }; +&scmi_regu { + scmi_vdd_adc: regulator@10 { + reg = <VOLTD_SCMI_STPMIC1_LDO1>; + regulator-name = "vdd_adc"; + }; + scmi_vdd_usb: regulator@13 { + reg = <VOLTD_SCMI_STPMIC1_LDO4>; + regulator-name = "vdd_usb"; + }; + scmi_vdd_sd: regulator@14 { + reg = <VOLTD_SCMI_STPMIC1_LDO5>; + regulator-name = "vdd_sd"; + }; + scmi_v1v8_periph: regulator@15 { + reg = <VOLTD_SCMI_STPMIC1_LDO6>; + regulator-name = "v1v8_periph"; + }; + scmi_v3v3_sw: regulator@19 { + reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>; + regulator-name = "v3v3_sw"; + }; +}; + &sdmmc1 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>; @@ -204,7 +196,7 @@ disable-wp; st,neg-edge; bus-width = <4>; - vmmc-supply = <&vdd_sd>; + vmmc-supply = <&scmi_vdd_sd>; status = "okay"; }; @@ -321,7 +313,7 @@ hub@1 { compatible = "usb424,2514"; reg = <1>; - vdd-supply = <&v3v3_sw>; + vdd-supply = <&scmi_v3v3_sw>; }; }; @@ -342,7 +334,7 @@ }; &usbphyc_port0 { - phy-supply = <&vdd_usb>; + phy-supply = <&scmi_vdd_usb>; st,current-boost-microamp = <1000>; st,decrease-hs-slew-rate; st,tune-hs-dc-level = <2>; @@ -356,7 +348,7 @@ }; &usbphyc_port1 { - phy-supply = <&vdd_usb>; + phy-supply = <&scmi_vdd_usb>; st,current-boost-microamp = <1000>; st,decrease-hs-slew-rate; st,tune-hs-dc-level = <2>; diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 05c9c4f8064c..098153ee99a3 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -6,6 +6,17 @@ #include <dt-bindings/pinctrl/stm32-pinfunc.h> &pinctrl { + adc1_ain_pins_a: adc1-ain-0 { + pins { + pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */ + <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */ + <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */ + <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */ + <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */ + <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */ + }; + }; + adc1_in6_pins_a: adc1-in6-0 { pins { pinmux = <STM32_PINMUX('F', 12, ANALOG)>; @@ -391,6 +402,46 @@ }; }; + ethernet0_rgmii_pins_e: rgmii-4 { + pins1 { + pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ + <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ + <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ + <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ + <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ + <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + pins2 { + pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ + <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ + <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ + <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */ + <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ + <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ + bias-disable; + }; + }; + + ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 { + pins1 { + pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ + <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ + <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ + <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ + <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ + <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ + <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ + <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ + <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ + <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ + <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ + }; + }; + ethernet0_rmii_pins_a: rmii-0 { pins1 { pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */ @@ -1154,6 +1205,20 @@ }; }; + pwm1_pins_c: pwm1-2 { + pins { + pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */ + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm1_sleep_pins_c: pwm1-sleep-2 { + pins { + pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */ + }; + }; + pwm2_pins_a: pwm2-0 { pins { pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */ @@ -1280,6 +1345,26 @@ }; }; + pwm8_pins_b: pwm8-1 { + pins { + pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */ + <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */ + <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */ + <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */ + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm8_sleep_pins_b: pwm8-sleep-1 { + pins { + pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */ + <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */ + <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */ + <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */ + }; + }; + pwm12_pins_a: pwm12-0 { pins { pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */ @@ -2074,6 +2159,20 @@ }; }; + spi2_pins_c: spi2-2 { + pins1 { + pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */ + <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ + bias-disable; + drive-push-pull; + }; + + pins2 { + pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ + bias-pull-down; + }; + }; + spi4_pins_a: spi4-0 { pins { pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */ @@ -2088,6 +2187,21 @@ }; }; + spi5_pins_a: spi5-0 { + pins1 { + pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */ + <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */ + bias-disable; + }; + }; + stusb1600_pins_a: stusb1600-0 { pins { pinmux = <STM32_PINMUX('I', 11, GPIO)>; @@ -2578,6 +2692,21 @@ }; }; + usart3_pins_f: usart3-5 { + pins1 { + pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ + <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ + <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */ diff --git a/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi b/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi index 543f24c2f4f6..dc3b09f2f2af 100644 --- a/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi @@ -16,7 +16,6 @@ #address-cells = <1>; #size-cells = <0>; linaro,optee-channel-id = <0>; - shmem = <&scmi_shm>; scmi_clk: protocol@14 { reg = <0x14>; @@ -35,22 +34,21 @@ #address-cells = <1>; #size-cells = <0>; - scmi_reg11: reg11@0 { + scmi_reg11: regulator@0 { reg = <0>; regulator-name = "reg11"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; }; - scmi_reg18: reg18@1 { - voltd-name = "reg18"; + scmi_reg18: regulator@1 { reg = <1>; regulator-name = "reg18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - scmi_usb33: usb33@2 { + scmi_usb33: regulator@2 { reg = <2>; regulator-name = "usb33"; regulator-min-microvolt = <3300000>; @@ -60,21 +58,6 @@ }; }; }; - - soc { - scmi_sram: sram@2ffff000 { - compatible = "mmio-sram"; - reg = <0x2ffff000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2ffff000 0x1000>; - - scmi_shm: scmi-sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0 0x80>; - }; - }; - }; }; ®11 { diff --git a/arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts b/arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts index 7ecf31263abc..c90d815f906b 100644 --- a/arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts +++ b/arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts @@ -23,6 +23,18 @@ clock-frequency = <25000000>; }; + pse_t1l1: ethernet-pse-1 { + compatible = "podl-pse-regulator"; + pse-supply = <®_t1l1>; + #pse-cells = <0>; + }; + + pse_t1l2: ethernet-pse-2 { + compatible = "podl-pse-regulator"; + pse-supply = <®_t1l2>; + #pse-cells = <0>; + }; + mdio0: mdio { compatible = "virtual,mdio-gpio"; #address-cells = <1>; @@ -32,6 +44,24 @@ }; + reg_t1l1: regulator-pse-t1l1 { + compatible = "regulator-fixed"; + regulator-name = "pse-t1l1"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + gpio = <&gpiog 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_t1l2: regulator-pse-t1l2 { + compatible = "regulator-fixed"; + regulator-name = "pse-t1l2"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + gpio = <&gpiog 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + wifi_pwrseq: wifi-pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&gpiod 8 GPIO_ACTIVE_LOW>; @@ -92,6 +122,7 @@ reset-gpios = <&gpiog 12 GPIO_ACTIVE_LOW>; reset-assert-us = <10>; reset-deassert-us = <35>; + pses = <&pse_t1l1>; }; /* TI DP83TD510E */ @@ -102,6 +133,7 @@ reset-gpios = <&gpiog 11 GPIO_ACTIVE_LOW>; reset-assert-us = <10>; reset-deassert-us = <35>; + pses = <&pse_t1l2>; }; /* Micrel KSZ9031 */ diff --git a/arch/arm/boot/dts/st/stm32mp157.dtsi b/arch/arm/boot/dts/st/stm32mp157.dtsi index 5e733cd16ff9..6197d878894d 100644 --- a/arch/arm/boot/dts/st/stm32mp157.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157.dtsi @@ -22,9 +22,27 @@ reg = <0x5a000000 0x800>; clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; clock-names = "pclk", "ref", "px_clk"; + phy-dsi-supply = <®18>; resets = <&rcc DSI_R>; reset-names = "apb"; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi_in: endpoint { + }; + }; + + port@1 { + reg = <1>; + dsi_out: endpoint { + }; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts index 4279b26547df..df97e03d2a5a 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts +++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts @@ -46,26 +46,14 @@ &dsi { status = "okay"; - phy-dsi-supply = <®18>; - - ports { - #address-cells = <1>; - #size-cells = <0>; +}; - port@0 { - reg = <0>; - dsi_in: endpoint { - remote-endpoint = <<dc_ep0_out>; - }; - }; +&dsi_in { + remote-endpoint = <<dc_ep0_out>; +}; - port@1 { - reg = <1>; - dsi_out: endpoint { - remote-endpoint = <&bridge_in>; - }; - }; - }; +&dsi_out { + remote-endpoint = <&bridge_in>; }; &i2c6 { diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts index efba54289820..f8e404346396 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts +++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts @@ -46,26 +46,14 @@ &dsi { status = "okay"; - phy-dsi-supply = <®18>; - - ports { - #address-cells = <1>; - #size-cells = <0>; +}; - port@0 { - reg = <0>; - dsi_in_ltdc: endpoint { - remote-endpoint = <<dc_out_dsi>; - }; - }; +&dsi_in { + remote-endpoint = <<dc_out_dsi>; +}; - port@1 { - reg = <1>; - dsi_out_bridge: endpoint { - remote-endpoint = <&bridge_in_dsi>; - }; - }; - }; +&dsi_out { + remote-endpoint = <&bridge_in_dsi>; }; &i2c6 { @@ -88,7 +76,7 @@ port@0 { reg = <0>; bridge_in_dsi: endpoint { - remote-endpoint = <&dsi_out_bridge>; + remote-endpoint = <&dsi_out>; data-lanes = <1 2>; }; }; @@ -108,7 +96,7 @@ port { ltdc_out_dsi: endpoint { - remote-endpoint = <&dsi_in_ltdc>; + remote-endpoint = <&dsi_in>; }; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts index 4bef2300ed7c..510cca5acb79 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts @@ -34,26 +34,6 @@ #address-cells = <1>; #size-cells = <0>; status = "okay"; - phy-dsi-supply = <®18>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dsi_in: endpoint { - remote-endpoint = <<dc_ep1_out>; - }; - }; - - port@1 { - reg = <1>; - dsi_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; - }; panel@0 { compatible = "orisetech,otm8009a"; @@ -70,6 +50,14 @@ }; }; +&dsi_in { + remote-endpoint = <<dc_ep1_out>; +}; + +&dsi_out { + remote-endpoint = <&panel_in>; +}; + &i2c1 { touchscreen@38 { compatible = "focaltech,ft6236"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi b/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi index 94e38141af67..009209ca673b 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi @@ -310,7 +310,6 @@ vref_ddr: vref_ddr { regulator-name = "vref_ddr"; regulator-always-on; - regulator-over-current-protection; }; bst_out: boost { @@ -321,7 +320,7 @@ vbus_otg: pwr_sw1 { regulator-name = "vbus_otg"; interrupts = <IT_OCP_OTG 0>; - regulator-active-discharge; + regulator-active-discharge = <1>; }; vbus_usbh: pwr_sw2 { @@ -368,8 +367,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; interrupt-names = "wdg"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts index af3800501875..cd9c3ff5378b 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts @@ -100,30 +100,10 @@ }; &dsi { - phy-dsi-supply = <®18>; #address-cells = <1>; #size-cells = <0>; status = "okay"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dsi_in: endpoint { - remote-endpoint = <<dc_ep0_out>; - }; - }; - - port@1 { - reg = <1>; - dsi_out: endpoint { - remote-endpoint = <&dsi_panel_in>; - }; - }; - }; - panel@0 { compatible = "raydium,rm68200"; reg = <0>; @@ -140,6 +120,14 @@ }; }; +&dsi_in { + remote-endpoint = <<dc_ep0_out>; +}; + +&dsi_out { + remote-endpoint = <&dsi_panel_in>; +}; + ðernet0 { status = "okay"; pinctrl-0 = <ðernet0_rgmii_pins_a>; diff --git a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts new file mode 100644 index 000000000000..81f254fb88b0 --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix + * Copyright (C) 2023 Leonard Göhrs, Pengutronix + */ + +/dts-v1/; + +#include "stm32mp157.dtsi" +#include "stm32mp15xc-lxa-tac.dtsi" + +/ { + model = "Linux Automation Test Automation Controller (TAC) Gen 1"; + compatible = "lxa,stm32mp157c-tac-gen1", "oct,stm32mp15xx-osd32", "st,stm32mp157"; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&v3v3>; + + brightness-levels = <0 31 63 95 127 159 191 223 255>; + default-brightness-level = <7>; + pwms = <&backlight_pwm 1 1000000 0>; + }; + + reg_iobus_12v: regulator-iobus-12v { + compatible = "regulator-fixed"; + vin-supply = <®_12v>; + + gpio = <&gpioh 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt = <12000000>; + regulator-min-microvolt = <12000000>; + regulator-name = "12V_IOBUS"; + }; +}; + +&gpioa { + gpio-line-names = "", "", "STACK_CS2", "", "STACK_CS3", /* 0 */ + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */ + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */ + ""; /* 15 */ +}; + +&gpioc { + gpio-line-names = "", "STACK_CS1", "", "", "", /* 0 */ + "", "", "", "", "", /* 5 */ + "", ""; /* 10 */ +}; + +&gpu { + status = "disabled"; +}; + +&i2c1 { + powerboard_gpio: gpio@24 { + compatible = "nxp,pca9570"; + reg = <0x24>; + + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = "DUT_PWR_EN", "DUT_PWR_DISCH", "DUT_PWR_ADCRST", ""; + }; +}; + +&spi2 { + adc@0 { + compatible = "ti,lmp92064"; + reg = <0>; + spi-max-frequency = <5000000>; + vdd-supply = <®_pb_3v3>; + vdig-supply = <®_pb_3v3>; + reset-gpios = <&powerboard_gpio 2 GPIO_ACTIVE_HIGH>; + + shunt-resistor-micro-ohms = <15000>; + }; +}; + +&timers1 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + backlight_pwm: pwm { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pwm1_pins_c>; + pinctrl-1 = <&pwm1_sleep_pins_c>; + + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts new file mode 100644 index 000000000000..8a34d15e9005 --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix + * Copyright (C) 2023 Leonard Göhrs, Pengutronix + */ + +/dts-v1/; + +#include "stm32mp157.dtsi" +#include "stm32mp15xc-lxa-tac.dtsi" + +/ { + model = "Linux Automation Test Automation Controller (TAC) Gen 2"; + compatible = "lxa,stm32mp157c-tac-gen2", "oct,stm32mp15xx-osd32", "st,stm32mp157"; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&v3v3>; + + brightness-levels = <0 31 63 95 127 159 191 223 255>; + default-brightness-level = <7>; + pwms = <&led_pwm 3 1000000 0>; + }; + + reg_iobus_12v: regulator-iobus-12v { + compatible = "regulator-fixed"; + vin-supply = <®_12v>; + gpio = <&gpioh 13 GPIO_ACTIVE_LOW>; + regulator-max-microvolt = <12000000>; + regulator-min-microvolt = <12000000>; + regulator-name = "12V_IOBUS"; + }; + + led-controller-1 { + compatible = "pwm-leds-multicolor"; + + multi-led { + color = <LED_COLOR_ID_RGB>; + function = LED_FUNCTION_STATUS; + max-brightness = <65535>; + + led-red { + active-low; + color = <LED_COLOR_ID_RED>; + pwms = <&led_pwm 0 1000000 0>; + }; + + led-green { + active-low; + color = <LED_COLOR_ID_GREEN>; + pwms = <&led_pwm 2 1000000 0>; + }; + + led-blue { + active-low; + color = <LED_COLOR_ID_BLUE>; + pwms = <&led_pwm 1 1000000 0>; + }; + }; + }; + + led-controller-2 { + compatible = "gpio-leds"; + + led-5 { + label = "tac:green:iobus"; + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>; + }; + + led-6 { + label = "tac:green:can"; + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>; + }; + + led-7 { + label = "tac:green:out0"; + gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>; + }; + + led-8 { + label = "tac:green:out1"; + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>; + }; + + led-9 { + label = "tac:green:uarttx"; + gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>; + }; + + led-10 { + label = "tac:green:uartrx"; + gpios = <&gpiof 6 GPIO_ACTIVE_HIGH>; + }; + + led-11 { + label = "tac:green:usbh1"; + gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>; + }; + + led-12 { + label = "tac:green:usbh2"; + gpios = <&gpiod 6 GPIO_ACTIVE_HIGH>; + }; + + led-13 { + label = "tac:green:usbh3"; + gpios = <&gpiob 9 GPIO_ACTIVE_HIGH>; + }; + + led-14 { + label = "tac:green:usbg"; + gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "usb-gadget"; + }; + + led-15 { + label = "tac:green:dutpwr"; + gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpioa { + gpio-line-names = "", "", "DUT_PWR_EN", "", "STACK_CS3", /* 0 */ + "ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */ + "", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */ + ""; /* 15 */ +}; + +&gpioc { + gpio-line-names = "", "DUT_PWR_DISCH", "", "", "", /* 0 */ + "", "", "", "", "", /* 5 */ + "", ""; /* 10 */ +}; + +&gpu { + status = "disabled"; +}; + +&m_can2 { + termination-gpios = <&gpioe 4 GPIO_ACTIVE_HIGH>; + termination-ohms = <120>; +}; + +&spi2 { + adc@0 { + compatible = "ti,lmp92064"; + reg = <0>; + + reset-gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>; + shunt-resistor-micro-ohms = <15000>; + spi-max-frequency = <5000000>; + vdd-supply = <®_pb_3v3>; + vdig-supply = <®_pb_3v3>; + }; +}; + +&timers8 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + led_pwm: pwm { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pwm8_pins_b>; + pinctrl-1 = <&pwm8_sleep_pins_b>; + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi b/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi index e22871dc580c..cf7485251490 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157c-odyssey-som.dtsi @@ -230,8 +230,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi new file mode 100644 index 000000000000..184b8bb4ebbf --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi @@ -0,0 +1,610 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix + * Copyright (C) 2023 Leonard Göhrs, Pengutronix + */ + +#include "stm32mp15xc.dtsi" +#include "stm32mp15xx-osd32.dtsi" +#include "stm32mp15xxac-pinctrl.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pwm/pwm.h> + +/ { + aliases { + ethernet0 = ðernet0; + ethernet1 = &port_uplink; + ethernet2 = &port_dut; + mmc1 = &sdmmc2; + serial0 = &uart4; + serial1 = &usart3; + }; + + chosen { + stdout-path = &uart4; + }; + + led-controller-0 { + compatible = "gpio-leds"; + + led-0 { + label = "tac:green:user1"; + gpios = <&gpiof 10 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-1 { + label = "tac:green:user2"; + gpios = <&gpiog 7 GPIO_ACTIVE_HIGH>; + }; + + led-2 { + label = "tac:green:statusdut"; + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; + }; + + /* led-3 and led-4 are internally connected antiparallel to one + * another inside the ethernet jack like this: + * GPIOA14 ---+---|led-3|>--+--- GPIOD15 + * +--<|led-4|---+ + * E.g. only one of the LEDs can be illuminated at a time while + * the other output must be driven low. + * This should likely be implemented using a multi color LED + * driver for antiparallel LEDs. + */ + led-3 { + label = "tac:green:statuslab"; + gpios = <&gpioa 14 GPIO_ACTIVE_HIGH>; + }; + + led-4 { + label = "tac:orange:statuslab"; + gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-lower { + label = "USER_BTN2"; + linux,code = <KEY_ESC>; + gpios = <&gpioe 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + + button-upper { + label = "USER_BTN"; + linux,code = <KEY_HOME>; + gpios = <&gpioi 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + }; + + /* supplied by either barrel connector or PoE */ + reg_12v: regulator-12v { + compatible = "regulator-fixed"; + regulator-name = "12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_12v>; + }; + + reg_1v2: regulator-1v2 { + compatible = "regulator-fixed"; + regulator-name = "1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + vin-supply = <®_5v>; + }; + + reg_pb_5v: regulator-pb-5v { + compatible = "regulator-fixed"; + regulator-name = "5V_POWERBOARD"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_5v>; + }; + + reg_pb_3v3: regulator-pb-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3V3_POWERBOARD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <®_pb_5v>; + }; + + output-iobus-12v { + compatible = "regulator-output"; + vout-supply = <®_iobus_12v>; + }; + + output-vuart { + compatible = "regulator-output"; + vout-supply = <&v3v3_hdmi>; + }; +}; + +baseboard_eeprom: &sip_eeprom { +}; + +&adc { + pinctrl-names = "default"; + pinctrl-0 = <&adc1_ain_pins_a>; + vdd-supply = <&vdd>; + vdda-supply = <&vdda>; + vref-supply = <&vrefbuf>; + status = "okay"; + + adc1: adc@0 { + st,adc-channels = <0 1 2 5 9 10 13 15>; + st,min-sample-time-nsecs = <5000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + channel@0 { + reg = <0>; + label = "HOST_2_CURR_FB"; + }; + + channel@1 { + reg = <1>; + label = "HOST_3_CURR_FB"; + }; + + channel@2 { + reg = <2>; + label = "OUT_0_FB"; + }; + + channel@5 { + reg = <5>; + label = "IOBUS_CURR_FB"; + }; + + channel@9 { + reg = <9>; + label = "IOBUS_VOLT_FB"; + }; + + channel@10 { + reg = <10>; + label = "OUT_1_FB"; + }; + + channel@13 { + reg = <13>; + label = "HOST_CURR_FB"; + }; + + channel@15 { + reg = <15>; + label = "HOST_1_CURR_FB"; + }; + }; + + adc2: adc@100 { + st,adc-channels = <12>; + st,min-sample-time-nsecs = <500000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + channel@12 { + reg = <12>; + label = "TEMP_INTERNAL"; + }; + }; +}; + +&crc1 { + status = "okay"; +}; + +&cryp1 { + status = "okay"; +}; + +&dts { + status = "okay"; +}; + +ðernet0 { + assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>; + assigned-clock-parents = <&rcc PLL4_P>; + assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF */ + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ðernet0_rgmii_pins_e>; + pinctrl-1 = <ðernet0_rgmii_sleep_pins_e>; + + st,eth-clk-sel; + phy-mode = "rgmii-id"; + + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +ðernet0_rgmii_pins_e { + pins1 { + /* Reduce EMI emission by reducing RGMII drive strength */ + slew-rate = <1>; + }; +}; + +&gpiob { + gpio-line-names = "", "", "", "", "", /* 0 */ + "", "USB_RESET", "", "", "", /* 5 */ + "", "", "", "", "", /* 10 */ + ""; /* 15 */ +}; + +&gpiod { + gpio-line-names = "", "", "", "", "TP38", /* 0 */ + "TP39", "", "", "TP41", "TP42", /* 5 */ + "OLED_DC", "", "", "ETH_CS", "", /* 10 */ + "ETH_LAB_LEDRN"; /* 15 */ +}; + +&gpioe { + gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */ + "", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */ + "UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */ + "TP27"; /* 15 */ +}; + +&gpiof { + gpio-line-names = "TP36", "TP37", "", "", "OLED_CS", /* 0 */ + "", "", "", "", "", /* 5 */ + "USER_LED1", "", "STACK_CS0", "", "", /* 10 */ + ""; /* 15 */ +}; + +&gpiog { + gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */ + "IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */ + "TP49", "", "", "", "", /* 10 */ + ""; /* 15 */ +}; + +&gpioh { + gpio-line-names = "", "", "OUT_1", "OUT_0", "OLED_RESET", /* 0 */ + "", "", "", "", "", /* 5 */ + "ETH1_PPS_B", "ETH_GPIO2", "", "IOBUS_PWR_EN", "", /* 10 */ + "TP33"; /* 15 */ +}; + +&gpioi { + gpio-line-names = "TIM_RTS", "", "", "", "DEVICE_DATA_EN", /* 0 */ + "", "", "", "ETH_WOL", "TP43", /* 5 */ + "", "USER_BTN"; /* 10 */ +}; + +&gpioz { + gpio-line-names = "HWID0", "HWID1", "HWID2", "HWID3", "", /* 0 */ + "", "HWID4", "HWID5"; /* 5 */ +}; + +&hash1 { + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_b>; + pinctrl-1 = <&i2c1_sleep_pins_b>; + status = "okay"; + + powerboard_eeprom: eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + vcc-supply = <&v3v3>; + }; + + temperature-sensor@48 { + compatible = "national,lm75a"; + reg = <0x48>; + status = "disabled"; + }; +}; + +&i2c5 { + /delete-property/dmas; + /delete-property/dma-names; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c5_pins_b>; + pinctrl-1 = <&i2c5_sleep_pins_b>; + + status = "okay"; + + usbhub: usbhub@2c { + compatible ="microchip,usb2514b"; + reg = <0x2c>; + vdd-supply = <&v3v3>; + reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>; + }; +}; + +&iwdg2 { + timeout-sec = <8>; + status = "okay"; +}; + +&m_can1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can1_pins_b>; + pinctrl-1 = <&m_can1_sleep_pins_b>; + status = "okay"; +}; + +&m_can2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can2_pins_a>; + pinctrl-1 = <&m_can2_sleep_pins_a>; + status = "okay"; +}; + +&pmic { + regulators { + buck1-supply = <®_5v>; /* VIN */ + buck2-supply = <®_5v>; /* VIN */ + buck3-supply = <®_5v>; /* VIN */ + buck4-supply = <®_5v>; /* VIN */ + ldo2-supply = <®_5v>; /* PMIC_LDO25IN */ + ldo4-supply = <®_5v>; /* VIN */ + ldo5-supply = <®_5v>; /* PMIC_LDO25IN */ + vref_ddr-supply = <®_5v>; /* VIN */ + boost-supply = <®_5v>; /* PMIC_BSTIN */ + pwr_sw2-supply = <&bst_out>; /* PMIC_SWIN */ + }; +}; + +&pwr_regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; +}; + +&rtc { + status = "okay"; +}; + +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>; + vmmc-supply = <&v3v3>; + + bus-width = <8>; + mmc-ddr-3_3v; + no-1-8-v; + non-removable; + no-sd; + no-sdio; + st,neg-edge; + + status = "okay"; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_c>; + cs-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&spi4 { + pinctrl-names = "default"; + pinctrl-0 = <&spi4_pins_a>; + cs-gpios = <&gpiof 4 GPIO_ACTIVE_LOW>; + status = "okay"; + + lcd: display@0 { + compatible = "shineworld,lh133k", "panel-mipi-dbi-spi"; + reg = <0>; + power-supply = <&v3v3>; + io-supply = <&v3v3>; + backlight = <&backlight>; + dc-gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpioh 4 GPIO_ACTIVE_HIGH>; + spi-3wire; + spi-max-frequency = <32000000>; + + width-mm = <23>; + height-mm = <23>; + rotation = <180>; + + panel-timing { + hactive = <240>; + vactive = <240>; + hback-porch = <0>; + vback-porch = <0>; + + clock-frequency = <0>; + hfront-porch = <0>; + hsync-len = <0>; + vfront-porch = <0>; + vsync-len = <0>; + }; + }; +}; + +&spi5 { + pinctrl-names = "default"; + pinctrl-0 = <&spi5_pins_a>; + + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + cs-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>; + + status = "okay"; + + switch: switch@0 { + compatible = "microchip,ksz9563"; + reg = <0>; + + reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; + spi-max-frequency = <44000000>; + + interrupt-parent = <&gpioa>; + interrupts = <6 IRQ_TYPE_EDGE_RISING>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port_dut: port@0 { + reg = <0>; + label = "dut"; + }; + + port_uplink: port@1 { + reg = <1>; + label = "uplink"; + }; + + port_cpu: port@2 { + reg = <2>; + label = "cpu"; + + ethernet = <ðernet0>; + + phy-mode = "rgmii-id"; + rx-internal-delay-ps = <2000>; + tx-internal-delay-ps = <2000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; +}; + +&timers2 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + timer@1 { + status = "okay"; + }; +}; + +&timers3 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + timer@2 { + status = "okay"; + }; +}; + +&timers4 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; + + timer@3 { + status = "okay"; + }; +}; + +&uart4 { + label = "debug"; + + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_a>; + + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; +}; + +&usart3 { + label = "dut"; + uart-has-rtscts; + + pinctrl-names = "default"; + pinctrl-0 = <&usart3_pins_f>; + + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + phy-names = "usb"; + + status = "okay"; +}; + +&usbotg_hs { + phys = <&usbphyc_port1 0>; + phy-names = "usb2-phy"; + + vusb_d-supply = <&vdd_usb>; + vusb_a-supply = <®18>; + + dr_mode = "peripheral"; + + status = "okay"; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; +}; + +&v3v3_hdmi { + /delete-property/regulator-always-on; +}; + +&vrefbuf { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + vdda-supply = <&vdda>; + + status = "okay"; +}; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi index e61df23d361a..74a11ccc5333 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi @@ -416,8 +416,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi index bba19f21e527..89881a26c614 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-som.dtsi @@ -227,8 +227,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; |