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| author | Sean Nyekjaer <sean@geanix.com> | 2023-08-16 14:24:22 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2023-09-11 08:52:36 +0200 |
| commit | e404979e55603ef8564fe6cf7c4368aa6aaee719 (patch) | |
| tree | 1d04ef63d6898f7512ca2214534e01ad2f8b4656 /arch/arm/boot/dts/st | |
| parent | 8892a1e1108e0aec956bd36d4079d56fcb41229f (diff) | |
| download | linux-stable-e404979e55603ef8564fe6cf7c4368aa6aaee719.tar.gz linux-stable-e404979e55603ef8564fe6cf7c4368aa6aaee719.tar.bz2 linux-stable-e404979e55603ef8564fe6cf7c4368aa6aaee719.zip | |
ARM: dts: stm32: Add alternate pinmux for ldtc pins
Add another mux option for ltdc pins, this is used on Octavo OSD32MP1-RED
board.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Reviewed-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts/st')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 92726ad7285f..5de4ec547411 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -1080,6 +1080,81 @@ }; }; + ltdc_pins_e: ltdc-4 { + pins1 { + pinmux = <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */ + <STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */ + <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */ + <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */ + <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */ + <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */ + <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */ + <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */ + <STM32_PINMUX('E', 14, AF13)>, /* LTDC_G0 */ + <STM32_PINMUX('E', 6, AF14)>, /* LTDC_G1 */ + <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */ + <STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */ + <STM32_PINMUX('H', 4, AF14)>, /* LTDC_G4 */ + <STM32_PINMUX('I', 0, AF14)>, /* LTDC_G5 */ + <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */ + <STM32_PINMUX('I', 2, AF14)>, /* LTDC_G7 */ + <STM32_PINMUX('D', 9, AF14)>, /* LTDC_B0 */ + <STM32_PINMUX('G', 12, AF14)>, /* LTDC_B1 */ + <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */ + <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */ + <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */ + <STM32_PINMUX('A', 3, AF14)>, /* LTDC_B5 */ + <STM32_PINMUX('B', 8, AF14)>, /* LTDC_B6 */ + <STM32_PINMUX('D', 8, AF14)>, /* LTDC_B7 */ + <STM32_PINMUX('F', 10, AF14)>, /* LTDC_DE */ + <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */ + <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + + pins2 { + pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LTDC_CLK */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + }; + + ltdc_sleep_pins_e: ltdc-sleep-4 { + pins { + pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* LTDC_R0 */ + <STM32_PINMUX('H', 3, ANALOG)>, /* LTDC_R1 */ + <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */ + <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */ + <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */ + <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */ + <STM32_PINMUX('H', 12, ANALOG)>, /* LTDC_R6 */ + <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */ + <STM32_PINMUX('D', 9, ANALOG)>, /* LTDC_B0 */ + <STM32_PINMUX('G', 12, ANALOG)>, /* LTDC_B1 */ + <STM32_PINMUX('G', 10, ANALOG)>, /* LTDC_B2 */ + <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */ + <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */ + <STM32_PINMUX('A', 3, ANALOG)>, /* LTDC_B5 */ + <STM32_PINMUX('B', 8, ANALOG)>, /* LTDC_B6 */ + <STM32_PINMUX('D', 8, ANALOG)>, /* LTDC_B7 */ + <STM32_PINMUX('E', 14, ANALOG)>, /* LTDC_G0 */ + <STM32_PINMUX('E', 6, ANALOG)>, /* LTDC_G1 */ + <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */ + <STM32_PINMUX('H', 14, ANALOG)>, /* LTDC_G3 */ + <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G4 */ + <STM32_PINMUX('I', 0, ANALOG)>, /* LTDC_G5 */ + <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */ + <STM32_PINMUX('I', 2, ANALOG)>, /* LTDC_G7 */ + <STM32_PINMUX('F', 10, ANALOG)>, /* LTDC_DE */ + <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */ + <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */ + <STM32_PINMUX('G', 7, ANALOG)>; /* LTDC_CLK */ + }; + }; + mco1_pins_a: mco1-0 { pins { pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */ |