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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-06-22 12:00:30 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-10-11 19:10:03 +0200 |
| commit | eeea0fa3c5ae45ea905fbf244291ec5440756fa1 (patch) | |
| tree | 1ab204fc0e235c84ee9cd13e1af3587334ca710d /arch/arm/boot/dts/sun5i.dtsi | |
| parent | 6ef8c8bf4c05028407ae75173f5790e5957640d2 (diff) | |
| download | linux-stable-eeea0fa3c5ae45ea905fbf244291ec5440756fa1.tar.gz linux-stable-eeea0fa3c5ae45ea905fbf244291ec5440756fa1.tar.bz2 linux-stable-eeea0fa3c5ae45ea905fbf244291ec5440756fa1.zip | |
ARM: sun5i: dt: Add UART3 CTS and RTS pins
Add a separate pinctrl node for the UART3 CTS and RTS pins shared between
the A10s and A13.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun5i.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun5i.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 433c83a321ca..7d355e52efe2 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -536,6 +536,13 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + uart3_pins_cts_rts_a: uart3-cts-rts@0 { + allwinner,pins = "PG11", "PG12"; + allwinner,function = "uart3"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; timer@01c20c00 { |