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authorChen-Yu Tsai <wens@csie.org>2015-12-01 13:47:22 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-12-01 14:09:18 +0100
commit1595b37cb212242791dd4ac9334242d32c8ad2c5 (patch)
tree33a8c7f801e5ae26c9c9d8dd65ed7209aa6fc681 /arch/arm/boot/dts/sun9i-a80.dtsi
parentd2118f06d10886513ca0f462afc8e5263d01692e (diff)
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ARM: dts: sun9i: Add consumer IR receiver device node and pinmux settings
The Allwinner A80 SoC has a consumer IR receiver, which is the same as older SoCs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80.dtsi')
-rw-r--r--arch/arm/boot/dts/sun9i-a80.dtsi19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index d02ee5d520e2..80777a33ee78 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -858,6 +858,18 @@
#reset-cells = <1>;
};
+ r_ir: ir@08002000 {
+ compatible = "allwinner,sun5i-a13-ir";
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_pins>;
+ clocks = <&apbs_gates 1>, <&r_ir_clk>;
+ clock-names = "apb", "ir";
+ resets = <&apbs_rst 1>;
+ reg = <0x08002000 0x40>;
+ status = "disabled";
+ };
+
r_uart: serial@08002800 {
compatible = "snps,dw-apb-uart";
reg = <0x08002800 0x400>;
@@ -881,6 +893,13 @@
#address-cells = <1>;
#size-cells = <0>;
#gpio-cells = <3>;
+
+ r_ir_pins: r_ir {
+ allwinner,pins = "PL6";
+ allwinner,function = "s_cir_rx";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
};
};
};