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| author | Samuel Holland <samuel@sholland.org> | 2020-02-22 22:08:51 -0600 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2020-04-14 09:21:26 +0200 |
| commit | 667aeaef74513173efc1755935cc8d225d30b50a (patch) | |
| tree | 664e483c904471855848b42137bdffdf43f96128 /arch/arm/boot/dts/sunxi-h3-h5.dtsi | |
| parent | 9a0e4df7f9bebb07cc0a1737d6f63f9dcbac3cbc (diff) | |
| download | linux-stable-667aeaef74513173efc1755935cc8d225d30b50a.tar.gz linux-stable-667aeaef74513173efc1755935cc8d225d30b50a.tar.bz2 linux-stable-667aeaef74513173efc1755935cc8d225d30b50a.zip | |
ARM: dts: sunxi: h3/h5: Add msgbox node
The H3 and H5 SoCs contain a message box that can be used to send
messages and interrupts back and forth between the ARM application CPUs
and the ARISC coprocessor. Add a device tree node for it.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 01a5df9aa71b..22d533d18992 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -239,6 +239,16 @@ }; }; + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun8i-h3-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; + }; + usb_otg: usb@1c19000 { compatible = "allwinner,sun8i-h3-musb"; reg = <0x01c19000 0x400>; |