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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-06-21 19:53:16 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-06-26 00:06:50 +0900 |
commit | bc8841f0c1e6945fd7fde6faad3300d1b08abd86 (patch) | |
tree | eb3a16a4d6deb350109c1155a29f34c441212d5f /arch/arm/boot/dts/uniphier-ld6b-ref.dts | |
parent | a188339ca5a396acc588e5851ed7e19f66b0ebd9 (diff) | |
download | linux-stable-bc8841f0c1e6945fd7fde6faad3300d1b08abd86.tar.gz linux-stable-bc8841f0c1e6945fd7fde6faad3300d1b08abd86.tar.bz2 linux-stable-bc8841f0c1e6945fd7fde6faad3300d1b08abd86.zip |
ARM: dts: uniphier: update to new Denali NAND binding
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.
Update DT for it.
In the new binding, the number of connected chips are described in
DT instead of run-time probed.
I added just one chip to the reference boards, where we do not know
if the on-board NAND device is a single chip or multiple chips.
If we added too many chips into DT, it would end up with the timeout
error in nand_scan_ident().
I changed all the pinctrl properties to use the single CS.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-ld6b-ref.dts')
-rw-r--r-- | arch/arm/boot/dts/uniphier-ld6b-ref.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts index 3d9080ee7aef..60994b6e8b99 100644 --- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts +++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts @@ -90,4 +90,8 @@ &nand { status = "okay"; + + nand@0 { + reg = <0>; + }; }; |