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authorAnand Moon <anand@edgeble.ai>2023-01-11 17:24:33 +0000
committerHeiko Stuebner <heiko@sntech.de>2023-01-15 15:28:59 +0100
commit594a76a4465a96bc11f8ecf4504907afb064ce41 (patch)
tree91a3cfa4e9a0c183e4d97983f784e8e4bd5ee164 /arch/arm/boot/dts
parentbdcb1f4e19cbbe9ee8197078d25a2d4c27216ab1 (diff)
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ARM: dts: rockchip: Add Ethernet GMAC node for RV1126
Rockchip RV1126 has GMAC 10/100/1000M ethernet controller Co-Developed-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Anand Moon <anand@edgeble.ai> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230111172437.5295-3-anand@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/rv1126.dtsi49
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
index 1cb43147e90b..1f07d0a4fa73 100644
--- a/arch/arm/boot/dts/rv1126.dtsi
+++ b/arch/arm/boot/dts/rv1126.dtsi
@@ -332,6 +332,55 @@
clock-names = "pclk", "timer";
};
+ gmac: ethernet@ffc40000 {
+ compatible = "rockchip,rv1126-gmac", "snps,dwmac-4.20a";
+ reg = <0xffc40000 0x4000>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq", "eth_wake_irq";
+ rockchip,grf = <&grf>;
+ clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>,
+ <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_REF>,
+ <&cru ACLK_GMAC>, <&cru PCLK_GMAC>,
+ <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_PTPREF>;
+ clock-names = "stmmaceth", "mac_clk_rx",
+ "mac_clk_tx", "clk_mac_ref",
+ "aclk_mac", "pclk_mac",
+ "clk_mac_speed", "ptp_ref";
+ resets = <&cru SRST_GMAC_A>;
+ reset-names = "stmmaceth";
+
+ snps,mixed-burst;
+ snps,tso;
+
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+ status = "disabled";
+
+ mdio: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ };
+
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,wr_osr_lmt = <4>;
+ snps,rd_osr_lmt = <8>;
+ snps,blen = <0 0 0 0 16 8 4>;
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <1>;
+ queue0 {};
+ };
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <1>;
+ queue0 {};
+ };
+ };
+
emmc: mmc@ffc50000 {
compatible = "rockchip,rv1126-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0xffc50000 0x4000>;