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authorDinh Nguyen <dinguyen@kernel.org>2017-05-09 09:21:08 -0500
committerDinh Nguyen <dinguyen@kernel.org>2017-06-23 09:29:13 -0500
commit3c56909ec2672d74d30f32f1c0ed8cfd7d6e2b14 (patch)
tree6e5224858597a4b493e2f41bc130f3cc8be27a30 /arch/arm/boot
parent5b5ada57e4df56940d4855069754460b31666806 (diff)
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ARM: dts: socfpga: set the i2c frequency
Use 'clock-frequency' binding for the i2c node that will put the I2C driver into the standard operating mode. 'speed-mode' was not a valid binding for the I2C driver, remove it. Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/socfpga_arria10_socdk.dtsi2
-rw-r--r--arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts2
-rw-r--r--arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts2
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index 94e088473823..3a32de9ded3b 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -130,13 +130,13 @@
};
&i2c1 {
- speed-mode = <0>;
status = "okay";
/*
* adjust the falling times to decrease the i2c frequency to 50Khz
* because the LCD module does not work at the standard 100Khz
*/
+ clock-frequency = <100000>;
i2c-sda-falling-time-ns = <6000>;
i2c-scl-falling-time-ns = <6000>;
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
index 7b49395452b6..b280e6494193 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts
@@ -86,7 +86,7 @@
&i2c0 {
status = "okay";
- speed-mode = <0>;
+ clock-frequency = <100000>;
adxl345: adxl345@0 {
compatible = "adi,adxl345";
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
index 21e397287e29..c2eb88aab8b3 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
@@ -58,7 +58,7 @@
&i2c0 {
status = "okay";
- speed-mode = <0>;
+ clock-frequency = <100000>;
stmpe1: stmpe811@41 {
compatible = "st,stmpe811";