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author | Mark Brown <broonie@kernel.org> | 2015-09-16 20:44:25 +0100 |
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committer | Mark Brown <broonie@kernel.org> | 2015-09-16 20:44:25 +0100 |
commit | 92243b6fc8fcb16bf401b055f7a0ba79f70a4115 (patch) | |
tree | 08e9fa205efb9bfab23b6ea59fc0a3eaa3fed82b /arch/arm/include/asm/cacheflush.h | |
parent | a394d635193b641f2c86ead5ada5b115d57c51f8 (diff) | |
parent | 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f (diff) | |
download | linux-stable-92243b6fc8fcb16bf401b055f7a0ba79f70a4115.tar.gz linux-stable-92243b6fc8fcb16bf401b055f7a0ba79f70a4115.tar.bz2 linux-stable-92243b6fc8fcb16bf401b055f7a0ba79f70a4115.zip |
Merge tag 'v4.3-rc1' into spi-fix-doc
Linux 4.3-rc1
Diffstat (limited to 'arch/arm/include/asm/cacheflush.h')
-rw-r--r-- | arch/arm/include/asm/cacheflush.h | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 4812cda8fd17..d5525bfc7e3e 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -140,8 +140,6 @@ extern struct cpu_cache_fns cpu_cache; * is visible to DMA, or data written by DMA to system memory is * visible to the CPU. */ -#define dmac_map_area cpu_cache.dma_map_area -#define dmac_unmap_area cpu_cache.dma_unmap_area #define dmac_flush_range cpu_cache.dma_flush_range #else @@ -161,8 +159,6 @@ extern void __cpuc_flush_dcache_area(void *, size_t); * is visible to DMA, or data written by DMA to system memory is * visible to the CPU. */ -extern void dmac_map_area(const void *, size_t, int); -extern void dmac_unmap_area(const void *, size_t, int); extern void dmac_flush_range(const void *, const void *); #endif @@ -506,4 +502,21 @@ static inline void set_kernel_text_ro(void) { } void flush_uprobe_xol_access(struct page *page, unsigned long uaddr, void *kaddr, unsigned long len); +/** + * secure_flush_area - ensure coherency across the secure boundary + * @addr: virtual address + * @size: size of region + * + * Ensure that the specified area of memory is coherent across the secure + * boundary from the non-secure side. This is used when calling secure + * firmware where the secure firmware does not ensure coherency. + */ +static inline void secure_flush_area(const void *addr, size_t size) +{ + phys_addr_t phys = __pa(addr); + + __cpuc_flush_dcache_area((void *)addr, size); + outer_flush_range(phys, phys + size); +} + #endif |