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| author | Chris Brand <chris.brand@broadcom.com> | 2016-05-11 14:36:18 -0700 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2016-06-06 11:47:22 -0700 |
| commit | 406c8f6c9954da1a521f2cb7efbee730e40b95b9 (patch) | |
| tree | 4a3b285cd7fb08b63e468137d41abbbe8cfd0bb5 /arch/arm/mach-bcm/board_bcm21664.c | |
| parent | 1a695a905c18548062509178b98bc91e67510864 (diff) | |
| download | linux-stable-406c8f6c9954da1a521f2cb7efbee730e40b95b9.tar.gz linux-stable-406c8f6c9954da1a521f2cb7efbee730e40b95b9.tar.bz2 linux-stable-406c8f6c9954da1a521f2cb7efbee730e40b95b9.zip | |
ARM: bcm21664: Remove reset code
The kona reset driver now provides this functionality.
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/mach-bcm/board_bcm21664.c')
| -rw-r--r-- | arch/arm/mach-bcm/board_bcm21664.c | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/arch/arm/mach-bcm/board_bcm21664.c b/arch/arm/mach-bcm/board_bcm21664.c index 82ad5687771f..65b3db06e57a 100644 --- a/arch/arm/mach-bcm/board_bcm21664.c +++ b/arch/arm/mach-bcm/board_bcm21664.c @@ -11,53 +11,12 @@ * GNU General Public License for more details. */ -#include <linux/of_address.h> #include <linux/of_platform.h> -#include <linux/io.h> #include <asm/mach/arch.h> #include "kona_l2_cache.h" -#define RSTMGR_DT_STRING "brcm,bcm21664-resetmgr" - -#define RSTMGR_REG_WR_ACCESS_OFFSET 0 -#define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4 - -#define RSTMGR_WR_PASSWORD 0xa5a5 -#define RSTMGR_WR_PASSWORD_SHIFT 8 -#define RSTMGR_WR_ACCESS_ENABLE 1 - -static void bcm21664_restart(enum reboot_mode mode, const char *cmd) -{ - void __iomem *base; - struct device_node *resetmgr; - - resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING); - if (!resetmgr) { - pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n"); - return; - } - base = of_iomap(resetmgr, 0); - if (!base) { - pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n"); - return; - } - - /* - * A soft reset is triggered by writing a 0 to bit 0 of the soft reset - * register. To write to that register we must first write the password - * and the enable bit in the write access enable register. - */ - writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) | - RSTMGR_WR_ACCESS_ENABLE, - base + RSTMGR_REG_WR_ACCESS_OFFSET); - writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET); - - /* Wait for reset */ - while (1); -} - static void __init bcm21664_init(void) { of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); @@ -71,6 +30,5 @@ static const char * const bcm21664_dt_compat[] = { DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor") .init_machine = bcm21664_init, - .restart = bcm21664_restart, .dt_compat = bcm21664_dt_compat, MACHINE_END |