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authorLinus Torvalds <torvalds@linux-foundation.org>2015-05-09 16:13:38 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2015-05-09 16:13:38 -0700
commit8f59ae0643b2057ad996ab23488e9be1ba2564f4 (patch)
treec5bc7c71d551455cd3f5d22726ab7ffcef8aff5e /arch/arm/mach-rockchip/pm.c
parent51dfcb076d1e1ce7006aa272cb7c4514740c7e47 (diff)
parentc9d862c48c48883a4327ae82f4a6de1eef928d60 (diff)
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann: "A few patches have come up since the merge window. The largest one is a rewrite of the PXA lubbock/mainstone IRQ handling. This was already broken in 2011 by a change to the GPIO code and only noticed now. The other changes contained here are: MAINTAINERS file updates: - Ray Jui and Scott Branden are now co-maintainers for some of the mach-bcm chips, while Christian Daudt and Marc Carino have stepped down. - Andrew Victor is no longer maintaining at91. Instead, Alexandre Belloni now becomes an official maintainer, after having done a bulk of the work for a while. - Baruch Siach, who added the mach-digicolor platform in 4.1 is now listed as maintainer - The git URL for mach-socfpga has changed Bug fixes: - Three bug fixes for new rockchip rk3288 code - A regression fix to make SD card support work on certain ux500 boards - multiple smaller dts fixes for imx, omap, mvebu, and shmobile - a regression fiix for omap3 power consumption - a fix for regression in the ARM CCI bus driver Configuration changes: - more imx platforms are now enabled in multi_v7_defconfig" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits) MAINTAINERS: add Conexant Digicolor machines entry MAINTAINERS: socfpga: update the git repo for SoCFPGA ARM: multi_v7_defconfig: Select more FSL SoCs MAINTAINERS: replace an AT91 maintainer drivers: CCI: fix used_mask init in validate_group() bus: omap_l3_noc: Fix master id address decoding for OMAP5 bus: omap_l3_noc: Fix offset for DRA7 CLK1_HOST_CLK1_2 instance ARM: dts: dra7: Fix efuse register size for ABB ARM: dts: am57xx-beagle-x15: Switch GPIO fan number ARM: dts: am57xx-beagle-x15: Switch UART mux pins ARM: dts: am437x-sk: reduce col-scan-delay-us ARM: dts: am437x-sk: fix for new newhaven display module revision ARM: dts: am57xx-beagle-x15: Fix RTC aliases ARM: dts: am57xx-beagle-x15: Fix IRQ type for mcp7941x ARM: dts: omap3: Add #iommu-cells to isp and iva iommu ARM: omap2plus_defconfig: Enable EXTCON_USB_GPIO ARM: dts: OMAP3-N900: Add microphone bias voltages ARM: OMAP2+: Fix omap off idle power consumption creeping up MAINTAINERS: Update brcmstb entry MAINTAINERS: Remove Christian Daudt for mach-bcm ...
Diffstat (limited to 'arch/arm/mach-rockchip/pm.c')
-rw-r--r--arch/arm/mach-rockchip/pm.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/pm.c b/arch/arm/mach-rockchip/pm.c
index b07d88602073..22812fe06460 100644
--- a/arch/arm/mach-rockchip/pm.c
+++ b/arch/arm/mach-rockchip/pm.c
@@ -44,9 +44,11 @@ static void __iomem *rk3288_bootram_base;
static phys_addr_t rk3288_bootram_phy;
static struct regmap *pmu_regmap;
+static struct regmap *grf_regmap;
static struct regmap *sgrf_regmap;
static u32 rk3288_pmu_pwr_mode_con;
+static u32 rk3288_grf_soc_con0;
static u32 rk3288_sgrf_soc_con0;
static inline u32 rk3288_l2_config(void)
@@ -70,12 +72,26 @@ static void rk3288_slp_mode_set(int level)
{
u32 mode_set, mode_set1;
+ regmap_read(grf_regmap, RK3288_GRF_SOC_CON0, &rk3288_grf_soc_con0);
+
regmap_read(sgrf_regmap, RK3288_SGRF_SOC_CON0, &rk3288_sgrf_soc_con0);
regmap_read(pmu_regmap, RK3288_PMU_PWRMODE_CON,
&rk3288_pmu_pwr_mode_con);
/*
+ * We need set this bit GRF_FORCE_JTAG here, for the debug module,
+ * otherwise, it may become inaccessible after resume.
+ * This creates a potential security issue, as the sdmmc pins may
+ * accept jtag data for a short time during resume if no card is
+ * inserted.
+ * But this is of course also true for the regular boot, before we
+ * turn of the jtag/sdmmc autodetect.
+ */
+ regmap_write(grf_regmap, RK3288_GRF_SOC_CON0, GRF_FORCE_JTAG |
+ GRF_FORCE_JTAG_WRITE);
+
+ /*
* SGRF_FAST_BOOT_EN - system to boot from FAST_BOOT_ADDR
* PCLK_WDT_GATE - disable WDT during suspend.
*/
@@ -83,6 +99,13 @@ static void rk3288_slp_mode_set(int level)
SGRF_PCLK_WDT_GATE | SGRF_FAST_BOOT_EN
| SGRF_PCLK_WDT_GATE_WRITE | SGRF_FAST_BOOT_EN_WRITE);
+ /*
+ * The dapswjdp can not auto reset before resume, that cause it may
+ * access some illegal address during resume. Let's disable it before
+ * suspend, and the MASKROM will enable it back.
+ */
+ regmap_write(sgrf_regmap, RK3288_SGRF_CPU_CON0, SGRF_DAPDEVICEEN_WRITE);
+
/* booting address of resuming system is from this register value */
regmap_write(sgrf_regmap, RK3288_SGRF_FAST_BOOT_ADDR,
rk3288_bootram_phy);
@@ -128,6 +151,9 @@ static void rk3288_slp_mode_set_resume(void)
regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0,
rk3288_sgrf_soc_con0 | SGRF_PCLK_WDT_GATE_WRITE
| SGRF_FAST_BOOT_EN_WRITE);
+
+ regmap_write(grf_regmap, RK3288_GRF_SOC_CON0, rk3288_grf_soc_con0 |
+ GRF_FORCE_JTAG_WRITE);
}
static int rockchip_lpmode_enter(unsigned long arg)
@@ -186,6 +212,13 @@ static int rk3288_suspend_init(struct device_node *np)
return PTR_ERR(pmu_regmap);
}
+ grf_regmap = syscon_regmap_lookup_by_compatible(
+ "rockchip,rk3288-grf");
+ if (IS_ERR(grf_regmap)) {
+ pr_err("%s: could not find grf regmap\n", __func__);
+ return PTR_ERR(pmu_regmap);
+ }
+
sram_np = of_find_compatible_node(NULL, NULL,
"rockchip,rk3288-pmu-sram");
if (!sram_np) {