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author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-12-12 15:26:48 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-12-12 15:26:48 -0800 |
commit | 26ceb127f7bcf473db926c6a026b18ddd6f274e8 (patch) | |
tree | a8944a9c0730c409b0cfb17c541085face068556 /arch/arm/mach-sa1100/include | |
parent | 8d14066755592a2906b4f2378aeb5471b602d3cb (diff) | |
parent | e9f2d6d66037cdf97487491e04053f411abc5d16 (diff) | |
download | linux-stable-26ceb127f7bcf473db926c6a026b18ddd6f274e8.tar.gz linux-stable-26ceb127f7bcf473db926c6a026b18ddd6f274e8.tar.bz2 linux-stable-26ceb127f7bcf473db926c6a026b18ddd6f274e8.zip |
Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King:
"The major updates included in this update are:
- Clang compatible stack pointer accesses by Behan Webster.
- SA11x0 updates from Dmitry Eremin-Solenikov.
- kgdb handling of breakpoints with read-only text/modules
- Support for Privileged-no-execute feature on ARMv7 to prevent
userspace code execution by the kernel.
- AMBA primecell bus handling of irq-safe runtime PM
- Unwinding support for memset/memzero/memmove/memcpy functions
- VFP fixes for Krait CPUs and improvements in detecting the VFP
architecture
- A number of code cleanups (using pr_*, removing or reducing the
severity of a couple of kernel messages, splitting ftrace asm code
out to a separate file, etc.)
- Add machine name to stack dump output"
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (62 commits)
ARM: 8247/2: pcmcia: sa1100: make use of device clock
ARM: 8246/2: pcmcia: sa1111: provide device clock
ARM: 8245/1: pcmcia: soc-common: enable/disable socket clocks
ARM: 8244/1: fbdev: sa1100fb: make use of device clock
ARM: 8243/1: sa1100: add a clock alias for sa1111 pcmcia device
ARM: 8242/1: sa1100: add cpu clock
ARM: 8221/1: PJ4: allow building in Thumb-2 mode
ARM: 8234/1: sa1100: reorder IRQ handling code
ARM: 8233/1: sa1100: switch to hwirq usage
ARM: 8232/1: sa1100: merge GPIO multiplexer IRQ to "normal" irq domain
ARM: 8231/1: sa1100: introduce irqdomains support
ARM: 8230/1: sa1100: shift IRQs by one
ARM: 8229/1: sa1100: replace irq numbers with names in irq driver
ARM: 8228/1: sa1100: drop entry-macro.S
ARM: 8227/1: sa1100: switch to MULTI_IRQ_HANDLER
ARM: 8241/1: Update processor_modes for hyp and monitor mode
ARM: 8240/1: MCPM: document mcpm_sync_init()
ARM: 8239/1: Introduce {set,clear}_pte_bit
ARM: 8238/1: mm: Refine set_memory_* functions
ARM: 8237/1: fix flush_pfn_alias
...
Diffstat (limited to 'arch/arm/mach-sa1100/include')
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/entry-macro.S | 41 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/irqs.h | 102 |
2 files changed, 51 insertions, 92 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/entry-macro.S b/arch/arm/mach-sa1100/include/mach/entry-macro.S deleted file mode 100644 index 8cf7630bf024..000000000000 --- a/arch/arm/mach-sa1100/include/mach/entry-macro.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * arch/arm/mach-sa1100/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for SA1100-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro get_irqnr_preamble, base, tmp - mov \base, #0xfa000000 @ ICIP = 0xfa050000 - add \base, \base, #0x00050000 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base] @ get irqs - ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 - ands \irqstat, \irqstat, \irqnr - mov \irqnr, #0 - beq 1001f - tst \irqstat, #0xff - moveq \irqstat, \irqstat, lsr #8 - addeq \irqnr, \irqnr, #8 - tsteq \irqstat, #0xff - moveq \irqstat, \irqstat, lsr #8 - addeq \irqnr, \irqnr, #8 - tsteq \irqstat, #0xff - moveq \irqstat, \irqstat, lsr #8 - addeq \irqnr, \irqnr, #8 - tst \irqstat, #0x0f - moveq \irqstat, \irqstat, lsr #4 - addeq \irqnr, \irqnr, #4 - tst \irqstat, #0x03 - moveq \irqstat, \irqstat, lsr #2 - addeq \irqnr, \irqnr, #2 - tst \irqstat, #0x01 - addeqs \irqnr, \irqnr, #1 -1001: - .endm - diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h index 3790298b7142..de0983494c7e 100644 --- a/arch/arm/mach-sa1100/include/mach/irqs.h +++ b/arch/arm/mach-sa1100/include/mach/irqs.h @@ -8,56 +8,56 @@ * 2001/11/14 RMK Cleaned up and standardised a lot of the IRQs. */ -#define IRQ_GPIO0 0 -#define IRQ_GPIO1 1 -#define IRQ_GPIO2 2 -#define IRQ_GPIO3 3 -#define IRQ_GPIO4 4 -#define IRQ_GPIO5 5 -#define IRQ_GPIO6 6 -#define IRQ_GPIO7 7 -#define IRQ_GPIO8 8 -#define IRQ_GPIO9 9 -#define IRQ_GPIO10 10 -#define IRQ_GPIO11_27 11 -#define IRQ_LCD 12 /* LCD controller */ -#define IRQ_Ser0UDC 13 /* Ser. port 0 UDC */ -#define IRQ_Ser1SDLC 14 /* Ser. port 1 SDLC */ -#define IRQ_Ser1UART 15 /* Ser. port 1 UART */ -#define IRQ_Ser2ICP 16 /* Ser. port 2 ICP */ -#define IRQ_Ser3UART 17 /* Ser. port 3 UART */ -#define IRQ_Ser4MCP 18 /* Ser. port 4 MCP */ -#define IRQ_Ser4SSP 19 /* Ser. port 4 SSP */ -#define IRQ_DMA0 20 /* DMA controller channel 0 */ -#define IRQ_DMA1 21 /* DMA controller channel 1 */ -#define IRQ_DMA2 22 /* DMA controller channel 2 */ -#define IRQ_DMA3 23 /* DMA controller channel 3 */ -#define IRQ_DMA4 24 /* DMA controller channel 4 */ -#define IRQ_DMA5 25 /* DMA controller channel 5 */ -#define IRQ_OST0 26 /* OS Timer match 0 */ -#define IRQ_OST1 27 /* OS Timer match 1 */ -#define IRQ_OST2 28 /* OS Timer match 2 */ -#define IRQ_OST3 29 /* OS Timer match 3 */ -#define IRQ_RTC1Hz 30 /* RTC 1 Hz clock */ -#define IRQ_RTCAlrm 31 /* RTC Alarm */ +#define IRQ_GPIO0 1 +#define IRQ_GPIO1 2 +#define IRQ_GPIO2 3 +#define IRQ_GPIO3 4 +#define IRQ_GPIO4 5 +#define IRQ_GPIO5 6 +#define IRQ_GPIO6 7 +#define IRQ_GPIO7 8 +#define IRQ_GPIO8 9 +#define IRQ_GPIO9 10 +#define IRQ_GPIO10 11 +#define IRQ_GPIO11_27 12 +#define IRQ_LCD 13 /* LCD controller */ +#define IRQ_Ser0UDC 14 /* Ser. port 0 UDC */ +#define IRQ_Ser1SDLC 15 /* Ser. port 1 SDLC */ +#define IRQ_Ser1UART 16 /* Ser. port 1 UART */ +#define IRQ_Ser2ICP 17 /* Ser. port 2 ICP */ +#define IRQ_Ser3UART 18 /* Ser. port 3 UART */ +#define IRQ_Ser4MCP 19 /* Ser. port 4 MCP */ +#define IRQ_Ser4SSP 20 /* Ser. port 4 SSP */ +#define IRQ_DMA0 21 /* DMA controller channel 0 */ +#define IRQ_DMA1 22 /* DMA controller channel 1 */ +#define IRQ_DMA2 23 /* DMA controller channel 2 */ +#define IRQ_DMA3 24 /* DMA controller channel 3 */ +#define IRQ_DMA4 25 /* DMA controller channel 4 */ +#define IRQ_DMA5 26 /* DMA controller channel 5 */ +#define IRQ_OST0 27 /* OS Timer match 0 */ +#define IRQ_OST1 28 /* OS Timer match 1 */ +#define IRQ_OST2 29 /* OS Timer match 2 */ +#define IRQ_OST3 30 /* OS Timer match 3 */ +#define IRQ_RTC1Hz 31 /* RTC 1 Hz clock */ +#define IRQ_RTCAlrm 32 /* RTC Alarm */ -#define IRQ_GPIO11 32 -#define IRQ_GPIO12 33 -#define IRQ_GPIO13 34 -#define IRQ_GPIO14 35 -#define IRQ_GPIO15 36 -#define IRQ_GPIO16 37 -#define IRQ_GPIO17 38 -#define IRQ_GPIO18 39 -#define IRQ_GPIO19 40 -#define IRQ_GPIO20 41 -#define IRQ_GPIO21 42 -#define IRQ_GPIO22 43 -#define IRQ_GPIO23 44 -#define IRQ_GPIO24 45 -#define IRQ_GPIO25 46 -#define IRQ_GPIO26 47 -#define IRQ_GPIO27 48 +#define IRQ_GPIO11 33 +#define IRQ_GPIO12 34 +#define IRQ_GPIO13 35 +#define IRQ_GPIO14 36 +#define IRQ_GPIO15 37 +#define IRQ_GPIO16 38 +#define IRQ_GPIO17 39 +#define IRQ_GPIO18 40 +#define IRQ_GPIO19 41 +#define IRQ_GPIO20 42 +#define IRQ_GPIO21 43 +#define IRQ_GPIO22 44 +#define IRQ_GPIO23 45 +#define IRQ_GPIO24 46 +#define IRQ_GPIO25 47 +#define IRQ_GPIO26 48 +#define IRQ_GPIO27 49 /* * The next 16 interrupts are for board specific purposes. Since @@ -65,8 +65,8 @@ * these. If you need more, increase IRQ_BOARD_END, but keep it * within sensible limits. IRQs 49 to 64 are available. */ -#define IRQ_BOARD_START 49 -#define IRQ_BOARD_END 65 +#define IRQ_BOARD_START 50 +#define IRQ_BOARD_END 66 /* * Figure out the MAX IRQ number. |