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authorJoakim Zhang <qiangqing.zhang@nxp.com>2021-07-21 18:12:19 +0800
committerDavid S. Miller <davem@davemloft.net>2021-07-21 14:31:22 -0700
commit649502a337544840f1fbab8660603e08e86e2f41 (patch)
tree12c663bb4f0d278f8bbeca76688b2862f40aecfb /arch/arm/mach-sa1100/ssp.c
parent240bfd134c592791fdceba1ce7fc3f973c33df2d (diff)
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dt-bindings: net: fsl,fec: improve the binding a bit
This patch improves the yaml a bit according to Rob Herring comments: 1) normalize interrupt-names property, there is no reason to support random order. 2) validate each string in clock-names property. 3) add constraints for fsl,num-tx-queues/fsl,num-rx-queues property. 4) change additionalProperties to false in order to do strict checking. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/arm/mach-sa1100/ssp.c')
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