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| author | Devi Priya <quic_devipriy@quicinc.com> | 2023-04-25 14:10:10 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-05-26 12:14:48 -0700 |
| commit | d9556c5c6c51aad2c2f760ce953735afa9162f94 (patch) | |
| tree | 79d7234ab6c592684f5b4c17de786f0f5ce45f3f /arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | |
| parent | 83022f6484b11a60dbf9a95a88c7ef8e59c4b19c (diff) | |
| download | linux-stable-d9556c5c6c51aad2c2f760ce953735afa9162f94.tar.gz linux-stable-d9556c5c6c51aad2c2f760ce953735afa9162f94.tar.bz2 linux-stable-d9556c5c6c51aad2c2f760ce953735afa9162f94.zip | |
arm64: dts: qcom: ipq9574: rename al02-c7 dts to rdp433
Rename the dts after Reference Design Platform(RDP) to adopt
standard naming convention.
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230425084010.15581-7-quic_devipriy@quicinc.com
Diffstat (limited to 'arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts new file mode 100644 index 000000000000..2ce8e09e7565 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * IPQ9574 RDP433 board device tree source + * + * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ipq9574.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7"; + compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574"; + + aliases { + serial0 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&blsp1_uart2 { + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdhc_1 { + pinctrl-0 = <&sdc_default_state>; + pinctrl-names = "default"; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + max-frequency = <384000000>; + bus-width = <8>; + status = "okay"; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&tlmm { + sdc_default_state: sdc-default-state { + clk-pins { + pins = "gpio5"; + function = "sdc_clk"; + drive-strength = <8>; + bias-disable; + }; + + cmd-pins { + pins = "gpio4"; + function = "sdc_cmd"; + drive-strength = <8>; + bias-pull-up; + }; + + data-pins { + pins = "gpio0", "gpio1", "gpio2", + "gpio3", "gpio6", "gpio7", + "gpio8", "gpio9"; + function = "sdc_data"; + drive-strength = <8>; + bias-pull-up; + }; + + rclk-pins { + pins = "gpio10"; + function = "sdc_rclk"; + drive-strength = <8>; + bias-pull-down; + }; + }; +}; + +&xo_board_clk { + clock-frequency = <24000000>; +}; |