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| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-03-16 15:13:01 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-04-04 20:18:31 -0700 |
| commit | 097d6525af378f4be768c05cc1d77183a4e742e3 (patch) | |
| tree | 72905573361b49ec7499e0de35321dc569148ca5 /arch/arm64/boot/dts/qcom/sm6375.dtsi | |
| parent | 33555cdae863984c7840ba742cfffe839a0f71e4 (diff) | |
| download | linux-stable-097d6525af378f4be768c05cc1d77183a4e742e3.tar.gz linux-stable-097d6525af378f4be768c05cc1d77183a4e742e3.tar.bz2 linux-stable-097d6525af378f4be768c05cc1d77183a4e742e3.zip | |
arm64: dts: qcom: sm6375: Bump CPU rail power collapse index
In preparation for supporting a less-deep sleep state, rename the
existing rail power off from _0 to _1.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230303-topic-sm6375_features0_dts-v2-12-708b8191f7eb@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm6375.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm6375.dtsi | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi index 036e36ceebb5..6b75d8611077 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -214,7 +214,7 @@ idle-states { entry-method = "psci"; - LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 { compatible = "arm,idle-state"; idle-state-name = "silver-rail-power-collapse"; arm,psci-suspend-param = <0x40000004>; @@ -224,7 +224,7 @@ local-timer-stop; }; - BIG_CPU_SLEEP_0: cpu-sleep-1-0 { + BIG_CPU_SLEEP_1: cpu-sleep-1-1 { compatible = "arm,idle-state"; idle-state-name = "gold-rail-power-collapse"; arm,psci-suspend-param = <0x40000004>; @@ -275,49 +275,49 @@ CPU_PD0: power-domain-cpu0 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + domain-idle-states = <&LITTLE_CPU_SLEEP_1>; }; CPU_PD1: power-domain-cpu1 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + domain-idle-states = <&LITTLE_CPU_SLEEP_1>; }; CPU_PD2: power-domain-cpu2 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + domain-idle-states = <&LITTLE_CPU_SLEEP_1>; }; CPU_PD3: power-domain-cpu3 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + domain-idle-states = <&LITTLE_CPU_SLEEP_1>; }; CPU_PD4: power-domain-cpu4 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + domain-idle-states = <&LITTLE_CPU_SLEEP_1>; }; CPU_PD5: power-domain-cpu5 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + domain-idle-states = <&LITTLE_CPU_SLEEP_1>; }; CPU_PD6: power-domain-cpu6 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; - domain-idle-states = <&BIG_CPU_SLEEP_0>; + domain-idle-states = <&BIG_CPU_SLEEP_1>; }; CPU_PD7: power-domain-cpu7 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; - domain-idle-states = <&BIG_CPU_SLEEP_0>; + domain-idle-states = <&BIG_CPU_SLEEP_1>; }; CLUSTER_PD: power-domain-cpu-cluster0 { |