diff options
author | Jagan Teki <jagan@amarulasolutions.com> | 2020-08-19 00:15:05 +0530 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2020-08-30 20:56:59 +0200 |
commit | bd77d0ad7a698f5e04edf02328d11e808a71d87c (patch) | |
tree | 041d799888945baf60edc9c1f09217cfbb695c29 /arch/arm64/boot/dts/rockchip | |
parent | 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5 (diff) | |
download | linux-stable-bd77d0ad7a698f5e04edf02328d11e808a71d87c.tar.gz linux-stable-bd77d0ad7a698f5e04edf02328d11e808a71d87c.tar.bz2 linux-stable-bd77d0ad7a698f5e04edf02328d11e808a71d87c.zip |
arm64: dts: rockchip: Fix power routing to support POE on rk3399-roc-pc
When POE used, the current power routing is failing to power-up
the PMIC regulators which cause Linux boot hangs.
This patch is trying to update the power routing in order to
support Type C0 and POE powering methods.
As per the schematics, sys_12v is a common output power regulator
when type c and POE power being used. sys_12v is supplied by dc_12v
which is supplied from MP8859 in type c0 power routing and sys_12v
is supplied by MP8009 PoE PD in POE power supply routing.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200818184505.30064-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts | 18 | ||||
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi | 12 |
2 files changed, 26 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts index 2acb3d500fb9..754627d97144 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts @@ -11,6 +11,16 @@ model = "Firefly ROC-RK3399-PC Mezzanine Board"; compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399"; + /* MP8009 PoE PD */ + poe_12v: poe-12v { + compatible = "regulator-fixed"; + regulator-name = "poe_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + vcc3v3_ngff: vcc3v3-ngff { compatible = "regulator-fixed"; regulator-name = "vcc3v3_ngff"; @@ -22,7 +32,7 @@ regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; + vin-supply = <&sys_12v>; }; vcc3v3_pcie: vcc3v3-pcie { @@ -34,10 +44,14 @@ pinctrl-0 = <&vcc3v3_pcie_en>; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; + vin-supply = <&sys_12v>; }; }; +&sys_12v { + vin-supply = <&poe_12v>; +}; + &pcie_phy { status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi index b85ec31cd283..e7a459fa4322 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi @@ -110,6 +110,14 @@ regulator-max-microvolt = <5000000>; }; + sys_12v: sys-12v { + compatible = "regulator-fixed"; + regulator-name = "sys_12v"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&dc_12v>; + }; + /* switched by pmic_sleep */ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { compatible = "regulator-fixed"; @@ -141,7 +149,7 @@ regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; + vin-supply = <&sys_12v>; }; vcca_0v9: vcca-0v9 { @@ -186,7 +194,7 @@ regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; + vin-supply = <&sys_12v>; }; vdd_log: vdd-log { |