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authorAndrew Davis <afd@ti.com>2022-08-22 19:11:36 -0500
committerVignesh Raghavendra <vigneshr@ti.com>2022-09-01 20:05:18 +0530
commitd683a73980a61cc5d8abea7f3f996028e64e9144 (patch)
tree36651a5cfa2d729c411f259a3724b9cbc2264b1d /arch/arm64/boot/dts/ti
parent49611f43e035f30be685fcf7468f23e85ce2ee06 (diff)
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arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node
J7200 has an instance of SA2UL in the MCU domain. Add DT node for the same. The device is marked TI_SCI_PD_SHARED as parts of this IP are also shared with the security co-processor and OP-TEE. The RNG node is added but marked disabled as it is firewalled off for exclusive use by OP-TEE. Any access to this device from Linux will result in firewall errors. We add the node for completeness of the hardware description. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20220823001136.10944-4-afd@ti.com
Diffstat (limited to 'arch/arm64/boot/dts/ti')
-rw-r--r--arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index ff13bbeed30c..e5be78a58682 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -375,4 +375,24 @@
ti,loczrama = <1>;
};
};
+
+ mcu_crypto: crypto@40900000 {
+ compatible = "ti,j721e-sa2ul";
+ reg = <0x00 0x40900000 0x00 0x1200>;
+ power-domains = <&k3_pds 265 TI_SCI_PD_SHARED>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
+ dmas = <&mcu_udmap 0xf501>, <&mcu_udmap 0x7502>,
+ <&mcu_udmap 0x7503>;
+ dma-names = "tx", "rx1", "rx2";
+ dma-coherent;
+
+ rng: rng@40910000 {
+ compatible = "inside-secure,safexcel-eip76";
+ reg = <0x00 0x40910000 0x00 0x7d>;
+ interrupts = <GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled"; /* Used by OP-TEE */
+ };
+ };
};