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author | Raffaele Tranquillini <raffaele.tranquillini@gmail.com> | 2021-09-25 13:38:08 +0200 |
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committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-10-24 13:04:03 -0500 |
commit | ff80dc99cd9a3240768d883a010de7595d274d3b (patch) | |
tree | 43bcc41ece40ca39dede9f4455e7beac5f3274a8 /arch/arm64/boot | |
parent | 0ac10b291bee84b00bf9fb2afda444e77e7f88f4 (diff) | |
download | linux-stable-ff80dc99cd9a3240768d883a010de7595d274d3b.tar.gz linux-stable-ff80dc99cd9a3240768d883a010de7595d274d3b.tar.bz2 linux-stable-ff80dc99cd9a3240768d883a010de7595d274d3b.zip |
arm64: dts: qcom: msm8996: xiaomi-gemini: Enable JDI LCD panel
This enables the JDI FHD_R63452 LCD panel used on Xiaomi Mi 5
Signed-off-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210925113808.524749-1-raffaele.tranquillini@gmail.com
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts index 5513fc238343..34f82e06ef53 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts @@ -91,12 +91,45 @@ }; +&dsi0 { + status = "okay"; + + vdd-supply = <&vreg_l2a_1p25>; + vdda-supply = <&vreg_l19a_3p3>; + vddio-supply = <&vreg_l14a_1p8>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mdss_dsi_default &mdss_te_default>; + pinctrl-1 = <&mdss_dsi_sleep &mdss_te_sleep>; + + panel: panel@0 { + compatible = "jdi,fhd-r63452"; + reg = <0>; + reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; + backlight = <&pmi8994_wled>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; +}; + +&dsi0_out { + remote-endpoint = <&panel_in>; +}; + &gpu { zap-shader { firmware-name = "qcom/msm8996/gemini/a530_zap.mbn"; }; }; +&pmi8994_wled { + status = "okay"; +}; + &q6asmdai { dai@0 { reg = <0>; |