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author | Fuad Tabba <tabba@google.com> | 2021-05-24 09:29:55 +0100 |
---|---|---|
committer | Will Deacon <will@kernel.org> | 2021-05-25 19:27:49 +0100 |
commit | 814b186079cd54d3fe3b6b8ab539cbd44705ef9d (patch) | |
tree | c2433f7dff0bb3a36a2425f38429a7e12b84ced2 /arch/arm64/include/asm/arch_gicv3.h | |
parent | 163d3f80695e31068c7d32244c9e6d406d5c5c00 (diff) | |
download | linux-stable-814b186079cd54d3fe3b6b8ab539cbd44705ef9d.tar.gz linux-stable-814b186079cd54d3fe3b6b8ab539cbd44705ef9d.tar.bz2 linux-stable-814b186079cd54d3fe3b6b8ab539cbd44705ef9d.zip |
arm64: __flush_dcache_area to take end parameter instead of size
To be consistent with other functions with similar names and
functionality in cacheflush.h, cache.S, and cachetlb.rst, change
to specify the range in terms of start and end, as opposed to
start and size.
No functional change intended.
Reported-by: Will Deacon <will@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Fuad Tabba <tabba@google.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20210524083001.2586635-13-tabba@google.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/arch_gicv3.h')
-rw-r--r-- | arch/arm64/include/asm/arch_gicv3.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h index 934b9be582d2..ed1cc9d8e6df 100644 --- a/arch/arm64/include/asm/arch_gicv3.h +++ b/arch/arm64/include/asm/arch_gicv3.h @@ -124,7 +124,8 @@ static inline u32 gic_read_rpr(void) #define gic_read_lpir(c) readq_relaxed(c) #define gic_write_lpir(v, c) writeq_relaxed(v, c) -#define gic_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l)) +#define gic_flush_dcache_to_poc(a,l) \ + __flush_dcache_area((unsigned long)(a), (unsigned long)(a)+(l)) #define gits_read_baser(c) readq_relaxed(c) #define gits_write_baser(v, c) writeq_relaxed(v, c) |