diff options
author | Mark Rutland <mark.rutland@arm.com> | 2018-12-07 18:39:20 +0000 |
---|---|---|
committer | Will Deacon <will.deacon@arm.com> | 2018-12-13 16:42:45 +0000 |
commit | aa6eece8ec5095e479a354365f5e5102bfab4f5a (patch) | |
tree | 2bda669d2334efd4d514dbcbb48a4801ece9400a /arch/arm64/include/asm/esr.h | |
parent | 15560657358539aafcac027445f1f34c29a889a6 (diff) | |
download | linux-stable-aa6eece8ec5095e479a354365f5e5102bfab4f5a.tar.gz linux-stable-aa6eece8ec5095e479a354365f5e5102bfab4f5a.tar.bz2 linux-stable-aa6eece8ec5095e479a354365f5e5102bfab4f5a.zip |
arm64: add pointer authentication register bits
The ARMv8.3 pointer authentication extension adds:
* New fields in ID_AA64ISAR1 to report the presence of pointer
authentication functionality.
* New control bits in SCTLR_ELx to enable this functionality.
* New system registers to hold the keys necessary for this
functionality.
* A new ESR_ELx.EC code used when the new instructions are affected by
configurable traps
This patch adds the relevant definitions to <asm/sysreg.h> and
<asm/esr.h> for these, to be used by subsequent patches.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/esr.h')
-rw-r--r-- | arch/arm64/include/asm/esr.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 23602a0083ad..52233f00d53d 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -30,7 +30,8 @@ #define ESR_ELx_EC_CP14_LS (0x06) #define ESR_ELx_EC_FP_ASIMD (0x07) #define ESR_ELx_EC_CP10_ID (0x08) /* EL2 only */ -/* Unallocated EC: 0x09 - 0x0B */ +#define ESR_ELx_EC_PAC (0x09) /* EL2 and above */ +/* Unallocated EC: 0x0A - 0x0B */ #define ESR_ELx_EC_CP14_64 (0x0C) /* Unallocated EC: 0x0d */ #define ESR_ELx_EC_ILL (0x0E) |