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authorWill Deacon <will.deacon@arm.com>2018-06-15 11:37:34 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2018-09-14 17:46:01 +0100
commitd71be2b6c0e19180b5f80a6d42039cc074a693a2 (patch)
treea76f555a9b74a6a8e8ed9733e7eac60c6f880ec6 /arch/arm64/kernel/cpuinfo.c
parentca7f686ac9fe87a9175696a8744e095ab9749c49 (diff)
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arm64: cpufeature: Detect SSBS and advertise to userspace
Armv8.5 introduces a new PSTATE bit known as Speculative Store Bypass Safe (SSBS) which can be used as a mitigation against Spectre variant 4. Additionally, a CPU may provide instructions to manipulate PSTATE.SSBS directly, so that userspace can toggle the SSBS control without trapping to the kernel. This patch probes for the existence of SSBS and advertise the new instructions to userspace if they exist. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/cpuinfo.c')
-rw-r--r--arch/arm64/kernel/cpuinfo.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index e9ab7b3ed317..dce971f2c167 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -81,6 +81,7 @@ static const char *const hwcap_str[] = {
"uscat",
"ilrcpc",
"flagm",
+ "ssbs",
NULL
};